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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-10-14 12:51:04 +0300 |
|---|---|---|
| committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-10-30 17:05:18 +0300 |
| commit | 4973ddc8426405ebe71c48bd3d5e20d83877c076 (patch) | |
| tree | f0795a27fa7e09d003d48e1541a306c36f54a0df /drivers/pinctrl/intel/pinctrl-cherryview.c | |
| parent | d6d5df1db6e9d7f8f76d2911707f7d5877251b02 (diff) | |
| download | linux-4973ddc8426405ebe71c48bd3d5e20d83877c076.tar.xz | |
pinctrl: intel: Avoid potential glitches if pin is in GPIO mode
When consumer requests a pin, in order to be on the safest side,
we switch it first to GPIO mode followed by immediate transition
to the input state. Due to posted writes it's luckily to be a single
I/O transaction.
However, if firmware or boot loader already configures the pin
to the GPIO mode, user expects no glitches for the requested pin.
We may check if the pin is pre-configured and leave it as is
till the actual consumer toggles its state to avoid glitches.
Fixes: 7981c0015af2 ("pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support")
Depends-on: f5a26acf0162 ("pinctrl: intel: Initialize GPIO properly when used through irqchip")
Cc: stable@vger.kernel.org
Cc: fei.yang@intel.com
Reported-by: Oliver Barta <oliver.barta@aptiv.com>
Reported-by: Malin Jonsson <malin.jonsson@ericsson.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/pinctrl/intel/pinctrl-cherryview.c')
0 files changed, 0 insertions, 0 deletions