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| author | Linus Walleij <linus.walleij@linaro.org> | 2020-09-22 00:44:41 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2020-09-22 00:44:41 +0300 |
| commit | 5b398f8fc186d48bb6a0966aa5c6ce12535f8e33 (patch) | |
| tree | 000cea7f87bb07dcfd108a76c78b85ecca37eb59 /drivers/pinctrl/intel/Kconfig | |
| parent | e777f8c8f9f6a3fe4f42f5f101620adc60b78616 (diff) | |
| parent | a0bf06dc51dbbc5ad182b1bcf4d879db8d297c5e (diff) | |
| download | linux-5b398f8fc186d48bb6a0966aa5c6ce12535f8e33.tar.xz | |
Merge tag 'intel-pinctrl-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel
intel-pinctrl for v5.10-1
* Add last part of cleanup Cherryview driver to align with other drivers
* Due to above clean up Cherryview and Baytrail drivers to use common API
The following is an automated git shortlog grouped by driver:
baytrail:
- Switch to use intel_pinctrl_get_soc_data()
cherryview:
- Preserve CHV_PADCTRL1_INVRXTX_TXDATA flag on GPIOs
- Switch to use intel_pinctrl_get_soc_data()
- Utilize temporary variable to hold device pointer
- Switch to use struct intel_pinctrl
- Move custom community members to separate data struct
- Drop stale comment
intel:
- Update header block to reflect direct dependencies
- Extract intel_pinctrl_get_soc_data() helper for wider use
Diffstat (limited to 'drivers/pinctrl/intel/Kconfig')
| -rw-r--r-- | drivers/pinctrl/intel/Kconfig | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig index b3e6060db52d..28e5f824ba45 100644 --- a/drivers/pinctrl/intel/Kconfig +++ b/drivers/pinctrl/intel/Kconfig @@ -6,11 +6,7 @@ if (X86 || COMPILE_TEST) config PINCTRL_BAYTRAIL bool "Intel Baytrail GPIO pin control" depends on ACPI - select GPIOLIB - select GPIOLIB_IRQCHIP - select PINMUX - select PINCONF - select GENERIC_PINCONF + select PINCTRL_INTEL help driver for memory mapped GPIO functionality on Intel Baytrail platforms. Supports 3 banks with 102, 28 and 44 gpios. @@ -22,11 +18,7 @@ config PINCTRL_BAYTRAIL config PINCTRL_CHERRYVIEW tristate "Intel Cherryview/Braswell pinctrl and GPIO driver" depends on ACPI - select PINMUX - select PINCONF - select GENERIC_PINCONF - select GPIOLIB - select GPIOLIB_IRQCHIP + select PINCTRL_INTEL help Cherryview/Braswell pinctrl driver provides an interface that allows configuring of SoC pins and using them as GPIOs. |