diff options
author | Bjorn Helgaas <bhelgaas@google.com> | 2023-02-22 22:47:28 +0300 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2023-02-22 22:47:28 +0300 |
commit | 191b41018856da2bcd6f3f3ab0b2eb1c7a9f8585 (patch) | |
tree | 1191927128f69530fddc0225b93f979660265b25 /drivers/pci | |
parent | ebdce9e3d085f7891463fd0046e04201d1604d0d (diff) | |
parent | a2b9b123ccac913e9f9b80337d687a2fe786a634 (diff) | |
download | linux-191b41018856da2bcd6f3f3ab0b2eb1c7a9f8585.tar.xz |
Merge branch 'pci/virtualization'
- Avoid FLR for AMD FCH AHCI adapters to avoid a hardware defect (Damien Le
Moal)
- Add ACS quirk for Wangxun NICs that don't allow peer-to-peer between
functions, but don't advertise an ACS Capability (Mengyuan Lou)
* pci/virtualization:
PCI: Add ACS quirk for Wangxun NICs
PCI: Avoid FLR for AMD FCH AHCI adapters
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/quirks.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 285acc4aaccc..494fa46f5767 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -4835,6 +4835,26 @@ static int pci_quirk_brcm_acs(struct pci_dev *dev, u16 acs_flags) PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF); } +/* + * Wangxun 10G/1G NICs have no ACS capability, and on multi-function + * devices, peer-to-peer transactions are not be used between the functions. + * So add an ACS quirk for below devices to isolate functions. + * SFxxx 1G NICs(em). + * RP1000/RP2000 10G NICs(sp). + */ +static int pci_quirk_wangxun_nic_acs(struct pci_dev *dev, u16 acs_flags) +{ + switch (dev->device) { + case 0x0100 ... 0x010F: + case 0x1001: + case 0x2001: + return pci_acs_ctrl_enabled(acs_flags, + PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF); + } + + return false; +} + static const struct pci_dev_acs_enabled { u16 vendor; u16 device; @@ -4980,6 +5000,8 @@ static const struct pci_dev_acs_enabled { { PCI_VENDOR_ID_NXP, 0x8d9b, pci_quirk_nxp_rp_acs }, /* Zhaoxin Root/Downstream Ports */ { PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, pci_quirk_zhaoxin_pcie_ports_acs }, + /* Wangxun nics */ + { PCI_VENDOR_ID_WANGXUN, PCI_ANY_ID, pci_quirk_wangxun_nic_acs }, { 0 } }; @@ -5340,6 +5362,7 @@ static void quirk_no_flr(struct pci_dev *dev) DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1487, quirk_no_flr); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x148c, quirk_no_flr); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x149c, quirk_no_flr); +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x7901, quirk_no_flr); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1502, quirk_no_flr); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1503, quirk_no_flr); |