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author | Mohan Kumar <mohankumar718@gmail.com> | 2019-04-20 07:07:20 +0300 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-05-09 15:49:58 +0300 |
commit | 34c6b7105e5a11174f856483cde8ad6e61b7236a (patch) | |
tree | a4fcbb148402bfcaf5b1aa1c662e87466aac4e82 /drivers/pci/quirks.c | |
parent | 25da8dbaaf0679b3b22c783952a8392071cfa135 (diff) | |
download | linux-34c6b7105e5a11174f856483cde8ad6e61b7236a.tar.xz |
PCI: Replace dev_printk(KERN_DEBUG) with dev_info(), etc
Replace dev_printk(KERN_DEBUG) with dev_info(), etc to be more consistent
with other logging and avoid checkpatch warnings.
The KERN_DEBUG messages could be converted to dev_dbg(), but that depends
on CONFIG_DYNAMIC_DEBUG and DEBUG, and we want most of these messages to
*always* be in the dmesg log.
Link: https://lore.kernel.org/lkml/1555733240-19875-1-git-send-email-mohankumar718@gmail.com
Signed-off-by: Mohan Kumar <mohankumar718@gmail.com>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r-- | drivers/pci/quirks.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 8d1135ca330f..3f5a763addd3 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -159,8 +159,7 @@ static int __init pci_apply_final_quirks(void) u8 tmp; if (pci_cache_line_size) - printk(KERN_DEBUG "PCI: CLS %u bytes\n", - pci_cache_line_size << 2); + pr_info("PCI: CLS %u bytes\n", pci_cache_line_size << 2); pci_apply_fixup_final_quirks = true; for_each_pci_dev(dev) { @@ -177,16 +176,16 @@ static int __init pci_apply_final_quirks(void) if (!tmp || cls == tmp) continue; - pci_printk(KERN_DEBUG, dev, "CLS mismatch (%u != %u), using %u bytes\n", - cls << 2, tmp << 2, - pci_dfl_cache_line_size << 2); + pci_info(dev, "CLS mismatch (%u != %u), using %u bytes\n", + cls << 2, tmp << 2, + pci_dfl_cache_line_size << 2); pci_cache_line_size = pci_dfl_cache_line_size; } } if (!pci_cache_line_size) { - printk(KERN_DEBUG "PCI: CLS %u bytes, default %u\n", - cls << 2, pci_dfl_cache_line_size << 2); + pr_info("PCI: CLS %u bytes, default %u\n", cls << 2, + pci_dfl_cache_line_size << 2); pci_cache_line_size = cls ? cls : pci_dfl_cache_line_size; } |