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author | Bjorn Helgaas <bhelgaas@google.com> | 2020-09-29 22:24:11 +0300 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2020-10-01 01:01:46 +0300 |
commit | 638c133e5f52a3793cb5494897df008f5cef0ddd (patch) | |
tree | e6096ced43b63c67477a8a04e199150990deed8d /drivers/pci/pci.c | |
parent | 454d082dbb47febbfe2998c3953e62cd917abbbf (diff) | |
download | linux-638c133e5f52a3793cb5494897df008f5cef0ddd.tar.xz |
PCI/PM: Revert "PCI/PM: Apply D2 delay as milliseconds, not microseconds"
This reverts commit 7e24bc347e57992d532bc2ed700209b0fc0a4bf5.
7e24bc347e57 was based on PCIe r5.0, sec 5.9, which claims we need a 200 ms
delay when transitioning to or from D2. However, sec 5.3.1.3 states the
delay as 200 μs (microseconds), as does the table in PCIe r4.0, sec 5.9.1.
This looks like a typo in the r5.0 spec, so revert back to a 200 μs delay
instead of a 200 ms delay.
Fixes: 7e24bc347e57 ("PCI/PM: Apply D2 delay as milliseconds, not microseconds")
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/pci/pci.c')
-rw-r--r-- | drivers/pci/pci.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index c4a26532a447..d69578ad44a0 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1065,7 +1065,7 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state) if (state == PCI_D3hot || dev->current_state == PCI_D3hot) pci_dev_d3_sleep(dev); else if (state == PCI_D2 || dev->current_state == PCI_D2) - msleep(PCI_PM_D2_DELAY); + udelay(PCI_PM_D2_DELAY); pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr); dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK); |