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authorNicolas Ferre <nicolas.ferre@atmel.com>2011-07-04 18:17:53 +0400
committerArtem Bityutskiy <artem.bityutskiy@intel.com>2011-09-11 16:02:15 +0400
commitfb5427508abbd635e877fabdf55795488119c2d6 (patch)
treefc37be0505a74d27df25111f851843ea271c9eb2 /drivers/pci/of.c
parent57b078a09bf0ab3f0babcfe6ecb2ac226d9178be (diff)
downloadlinux-fb5427508abbd635e877fabdf55795488119c2d6.tar.xz
mtd: atmel_nand: optimize read/write buffer functions
For PIO NAND access functions, we use the features of the SMC: - no need to take into account the NAND bus width: SMC will deal with this - use of an IO memcpy on the NAND chip-select space is able to generate proper SMC behavior. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Artem Bityutskiy <dedekind1@gmail.com>
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