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authorVidya Sagar <vidyas@nvidia.com>2019-08-13 14:36:18 +0300
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2019-08-13 17:49:43 +0300
commit7a6854f6874ff416afa6552706a0011418f07888 (patch)
treef8eafa67550b865dcab24f61f56e28520595b302 /drivers/pci/controller/dwc/pcie-designware.h
parent3924bc2fd1b607faa5cb0bc0655e9853656de31a (diff)
downloadlinux-7a6854f6874ff416afa6552706a0011418f07888.tar.xz
PCI: dwc: Move config space capability search API
Move PCIe config space capability search API to common DesignWare file as this can be used by both host and EP mode drivers. Signed-off-by: Vidya Sagar <vidyaos@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware.h')
-rw-r--r--drivers/pci/controller/dwc/pcie-designware.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index ffed084a0b4f..d8c66a6827dc 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -251,6 +251,8 @@ struct dw_pcie {
#define to_dw_pcie_from_ep(endpoint) \
container_of((endpoint), struct dw_pcie, ep)
+u8 dw_pcie_find_capability(struct dw_pcie *pci, u8 cap);
+
int dw_pcie_read(void __iomem *addr, int size, u32 *val);
int dw_pcie_write(void __iomem *addr, int size, u32 val);