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author | Bjorn Helgaas <bhelgaas@google.com> | 2019-07-13 01:08:32 +0300 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-07-13 01:08:32 +0300 |
commit | 6c90132f0e5f6c522ac3f6bd1f91961cb77fb9b6 (patch) | |
tree | aad7b2fb5d8d079e46868e60023d1cef45ff6567 /drivers/pci/controller/dwc/pcie-designware-host.c | |
parent | 8e7bc41cdcfe64f891a3e1b4913e1a4c107a3465 (diff) | |
parent | 381ed79c8655a40268ee7391f716edd90c5c3a97 (diff) | |
download | linux-6c90132f0e5f6c522ac3f6bd1f91961cb77fb9b6.tar.xz |
Merge branch 'remotes/lorenzo/pci/dwc'
- Add dwc API support to de-initialize host (Vidya Sagar)
- Clean up dwc DBI,ATU read and write APIs (Vidya Sagar)
- Export dwc APIs to support .remove() so drivers can be modular (Vidya
Sagar)
- Simplify imx6 Kconfig dependencies (Leonard Crestez)
- Fix dra7xx build error when !CONFIG_GPIOLIB (YueHaibing)
* remotes/lorenzo/pci/dwc:
PCI: dwc: pci-dra7xx: Fix compilation when !CONFIG_GPIOLIB
PCI: imx6: Simplify Kconfig depends on
PCI: dwc: Export APIs to support .remove() implementation
PCI: dwc: Cleanup DBI,ATU read and write APIs
PCI: dwc: Add API support to de-initialize host
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware-host.c')
-rw-r--r-- | drivers/pci/controller/dwc/pcie-designware-host.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 77db32529319..f93252d0da5b 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -311,6 +311,7 @@ void dw_pcie_msi_init(struct pcie_port *pp) dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4, upper_32_bits(msi_target)); } +EXPORT_SYMBOL_GPL(dw_pcie_msi_init); int dw_pcie_host_init(struct pcie_port *pp) { @@ -495,6 +496,16 @@ err_free_msi: dw_pcie_free_msi(pp); return ret; } +EXPORT_SYMBOL_GPL(dw_pcie_host_init); + +void dw_pcie_host_deinit(struct pcie_port *pp) +{ + pci_stop_root_bus(pp->root_bus); + pci_remove_root_bus(pp->root_bus); + if (pci_msi_enabled() && !pp->ops->msi_host_init) + dw_pcie_free_msi(pp); +} +EXPORT_SYMBOL_GPL(dw_pcie_host_deinit); static int dw_pcie_access_other_conf(struct pcie_port *pp, struct pci_bus *bus, u32 devfn, int where, int size, u32 *val, @@ -687,3 +698,4 @@ void dw_pcie_setup_rc(struct pcie_port *pp) val |= PORT_LOGIC_SPEED_CHANGE; dw_pcie_wr_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, val); } +EXPORT_SYMBOL_GPL(dw_pcie_setup_rc); |