diff options
| author | Wey-Yi Guy <wey-yi.w.guy@intel.com> | 2009-10-17 01:25:50 +0400 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2009-10-27 23:48:31 +0300 |
| commit | c09430abed4159e5c56aaea257d040f7452daba6 (patch) | |
| tree | 1bc3e17162880d7cba27c4d4ee95bb5addf54fb2 /drivers/net/wireless/iwlwifi/iwl-csr.h | |
| parent | 1f80989e8b7f79d8e916b14600488489bdd5569f (diff) | |
| download | linux-c09430abed4159e5c56aaea257d040f7452daba6.tar.xz | |
iwlwifi: show current power save status reported by uCode
Power save request is sent from driver to uCode, but there is no
indication from uCode about the current device power save state.
Reading GP_CNTRL register bit 25:24 to show the current power save
status
00: no power save
01: MAC power down
10: PHY power down
11: Error
The uCode could switch in and out of power save mode in the order of
once per 100-300 ms in many cases. The reading here should just be used for
reference on the current uCode power save status. Do not confuse this
reading with the PowerSave set by driver and mac80211.
Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-csr.h')
| -rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-csr.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h index 8f183e0fa512..401e1e01be67 100644 --- a/drivers/net/wireless/iwlwifi/iwl-csr.h +++ b/drivers/net/wireless/iwlwifi/iwl-csr.h @@ -235,6 +235,11 @@ #define CSR_OTP_GP_REG_OTP_ACCESS_MODE (0x00020000) /* 0 - absolute, 1 - relative */ #define CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK (0x00100000) /* bit 20 */ #define CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK (0x00200000) /* bit 21 */ +#define CSR_GP_REG_POWER_SAVE_STATUS_MSK (0x03000000) /* bit 24/25 */ +#define CSR_GP_REG_NO_POWER_SAVE (0x00000000) +#define CSR_GP_REG_MAC_POWER_SAVE (0x01000000) +#define CSR_GP_REG_PHY_POWER_SAVE (0x02000000) +#define CSR_GP_REG_POWER_SAVE_ERROR (0x03000000) /* EEPROM signature */ #define CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP (0x00000000) |