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authorVasanthakumar Thiagarajan <vasanth@atheros.com>2010-04-26 23:04:33 +0400
committerJohn W. Linville <linville@tuxdriver.com>2010-04-28 00:09:17 +0400
commite55537240f97635f9a7c42fac224ff80fa637624 (patch)
tree94d779ac70f20509849b4df56c9b4efc2aaac757 /drivers/net/wireless/ath/ath9k/hw.h
parentb360a884834a83ede845733cf344a29eb10dd2e3 (diff)
downloadlinux-e55537240f97635f9a7c42fac224ff80fa637624.tar.xz
ath9k_hw: Fix usec to hw clock conversion in 5Ghz for ar9003
Fast clock operation (44Mhz) is enabled for 5Ghz in ar9003, so take care of the conversion from usec to hw clock. Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 6c84d318e31b..7a1347b2453f 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -198,6 +198,7 @@ enum ath9k_hw_caps {
ATH9K_HW_CAP_EDMA = BIT(17),
ATH9K_HW_CAP_RAC_SUPPORTED = BIT(18),
ATH9K_HW_CAP_LDPC = BIT(19),
+ ATH9K_HW_CAP_FASTCLOCK = BIT(20),
};
enum ath9k_capability_type {