diff options
| author | Rajkumar Manoharan <rmanohar@qti.qualcomm.com> | 2016-03-22 14:52:19 +0300 |
|---|---|---|
| committer | Kalle Valo <kvalo@qca.qualcomm.com> | 2016-04-04 17:03:21 +0300 |
| commit | 5c86d97bcc1d42ce7f75685a61be4dad34ee8183 (patch) | |
| tree | 527236aeeb47072dee2b35aaca26f51c4886cc46 /drivers/net/wireless/ath/ath10k/htt.h | |
| parent | 128abd09134a5b415fef4373841ea6d3fb7b680f (diff) | |
| download | linux-5c86d97bcc1d42ce7f75685a61be4dad34ee8183.tar.xz | |
ath10k: combine txrx and replenish task
Since tx completion and rx indication processing are moved out
of txrx tasklet and rx ring lock contention also removed from txrx
for rx_ind messages, it would be efficient to combine both replenish
and txrx tasks. Refill threshold is adjusted for both AP135 and AP148
(low and high end systems). With this adjustment in AP135, TCP DL is
improved from 603 Mbps to 620 Mbps and UDP DL is improved from 758 Mbps
to 803 Mbps. Also no watchdog are observed on UDP BiDi.
Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath10k/htt.h')
| -rw-r--r-- | drivers/net/wireless/ath/ath10k/htt.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath/ath10k/htt.h b/drivers/net/wireless/ath/ath10k/htt.h index 1adcae4faccf..60bd9fe4b2d9 100644 --- a/drivers/net/wireless/ath/ath10k/htt.h +++ b/drivers/net/wireless/ath/ath10k/htt.h @@ -1662,7 +1662,6 @@ struct ath10k_htt { /* set if host-fw communication goes haywire * used to avoid further failures */ bool rx_confused; - struct tasklet_struct rx_replenish_task; atomic_t num_mpdus_ready; /* This is used to group tx/rx completions separately and process them @@ -1737,7 +1736,7 @@ struct htt_rx_desc { /* Refill a bunch of RX buffers for each refill round so that FW/HW can handle * aggregated traffic more nicely. */ -#define ATH10K_HTT_MAX_NUM_REFILL 16 +#define ATH10K_HTT_MAX_NUM_REFILL 100 /* * DMA_MAP expects the buffer to be an integral number of cache lines. |