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author | Pierre Ossman <drzeus@drzeus.cx> | 2008-12-31 21:56:05 +0300 |
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committer | Pierre Ossman <drzeus@drzeus.cx> | 2008-12-31 21:56:05 +0300 |
commit | 418f19ea17a99421b22a64e101e14b6a16bed66d (patch) | |
tree | 7c21fcc368c63f1f9907deac6d16b30bd371792d /drivers/net/ixgbe/ixgbe_phy.h | |
parent | 98444d3dd975653a4a970ecc0dfc30918da92f60 (diff) | |
parent | f6e10b865c3ea56bdaa8c6ecfee313b997900dbb (diff) | |
download | linux-418f19ea17a99421b22a64e101e14b6a16bed66d.tar.xz |
Merge branch 'master' of ../mmc
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_phy.h')
-rw-r--r-- | drivers/net/ixgbe/ixgbe_phy.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/net/ixgbe/ixgbe_phy.h b/drivers/net/ixgbe/ixgbe_phy.h index 9bfe3f2b1d8f..43a97bc420f5 100644 --- a/drivers/net/ixgbe/ixgbe_phy.h +++ b/drivers/net/ixgbe/ixgbe_phy.h @@ -63,6 +63,18 @@ #define IXGBE_SFF_VENDOR_OUI_FTL 0x00906500 #define IXGBE_SFF_VENDOR_OUI_AVAGO 0x00176A00 +/* I2C SDA and SCL timing parameters for standard mode */ +#define IXGBE_I2C_T_HD_STA 4 +#define IXGBE_I2C_T_LOW 5 +#define IXGBE_I2C_T_HIGH 4 +#define IXGBE_I2C_T_SU_STA 5 +#define IXGBE_I2C_T_HD_DATA 5 +#define IXGBE_I2C_T_SU_DATA 1 +#define IXGBE_I2C_T_RISE 1 +#define IXGBE_I2C_T_FALL 1 +#define IXGBE_I2C_T_SU_STO 4 +#define IXGBE_I2C_T_BUF 5 + s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw); s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw); @@ -77,4 +89,17 @@ s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw, bool autoneg, bool autoneg_wait_to_complete); +/* PHY specific */ +s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, + bool *link_up); +s32 ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw, + u16 *firmware_version); + +s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw); +s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw); +s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, + u16 *list_offset, + u16 *data_offset); + #endif /* _IXGBE_PHY_H_ */ |