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authorHuazhong Tan <tanhuazhong@huawei.com>2019-12-19 09:57:47 +0300
committerDavid S. Miller <davem@davemloft.net>2019-12-21 08:20:39 +0300
commitd9b81c963a4c4a0a6dd5d57c9d74d9dced77020d (patch)
tree31c4c076353d0dc9c026f6c8f062d04193cb7f7b /drivers/net/ethernet
parentff7dfcdd684b6277ed02c1025746a94cb1bfc397 (diff)
downloadlinux-d9b81c963a4c4a0a6dd5d57c9d74d9dced77020d.tar.xz
net: hns3: only print misc interrupt status when handling fails
Printing misc interrupt status of hardware error event in the IRQ handler is unnecessary, since hclge_handle_hw_msix_error() will print out the detail information for this hardware error when handling success. So, this patch removes the print in IRQ handler, and prints it when hclge_handle_hw_msix_error() fails. Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet')
-rw-r--r--drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index d1aafea918b0..a510f005209c 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -3005,8 +3005,6 @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval)
/* check for vector0 msix event source */
if (msix_src_reg & HCLGE_VECTOR0_REG_MSIX_MASK) {
- dev_info(&hdev->pdev->dev, "received event 0x%x\n",
- msix_src_reg);
*clearval = msix_src_reg;
return HCLGE_VECTOR0_EVENT_ERR;
}
@@ -3505,10 +3503,15 @@ static enum hnae3_reset_type hclge_get_reset_level(struct hnae3_ae_dev *ae_dev,
/* first, resolve any unknown reset type to the known type(s) */
if (test_bit(HNAE3_UNKNOWN_RESET, addr)) {
+ u32 msix_sts_reg = hclge_read_dev(&hdev->hw,
+ HCLGE_VECTOR0_PF_OTHER_INT_STS_REG);
/* we will intentionally ignore any errors from this function
* as we will end up in *some* reset request in any case
*/
- hclge_handle_hw_msix_error(hdev, addr);
+ if (hclge_handle_hw_msix_error(hdev, addr))
+ dev_info(&hdev->pdev->dev, "received msix interrupt 0x%x\n",
+ msix_sts_reg);
+
clear_bit(HNAE3_UNKNOWN_RESET, addr);
/* We defered the clearing of the error event which caused
* interrupt since it was not posssible to do that in