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authorThierry Reding <treding@nvidia.com>2017-03-10 19:35:01 +0300
committerDavid S. Miller <davem@davemloft.net>2017-03-13 09:35:21 +0300
commite6ea2d16fc615e82bbd9c022c6a4302f22f418bf (patch)
tree7ec5d6253bd404ff65b3f052def28007bfac7b9a /drivers/net/ethernet/stmicro/stmmac/dwmac4.h
parentcee45b2edafaa1063bd3a43ba3577490a26fed4c (diff)
downloadlinux-e6ea2d16fc615e82bbd9c022c6a4302f22f418bf.tar.xz
net: stmmac: dwc-qos: Add Tegra186 support
The NVIDIA Tegra186 SoC contains an instance of the Synopsys DWC ethernet QOS IP core. The binding that it uses is slightly different from existing ones because of the integration (clocks, resets, ...). Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/dwmac4.h')
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac4.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
index 3b1828b4d294..018fc2d447c4 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
@@ -25,6 +25,7 @@
#define GMAC_RXQ_CTRL0 0x000000a0
#define GMAC_INT_STATUS 0x000000b0
#define GMAC_INT_EN 0x000000b4
+#define GMAC_1US_TIC_COUNTER 0x000000dc
#define GMAC_PCS_BASE 0x000000e0
#define GMAC_PHYIF_CONTROL_STATUS 0x000000f8
#define GMAC_PMT 0x000000c0