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authorGiuseppe CAVALLARO <peppe.cavallaro@st.com>2012-04-04 08:33:27 +0400
committerDavid S. Miller <davem@davemloft.net>2012-04-05 02:39:24 +0400
commitcd7201f477b965f6c0220b798813c7000bc603c5 (patch)
tree0b5ac87d64a90efc1ddfca8620019c13fd0acad8 /drivers/net/ethernet/stmicro/stmmac/common.h
parent18f05d64ec36e27892cc0f55be707762aae053a1 (diff)
downloadlinux-cd7201f477b965f6c0220b798813c7000bc603c5.tar.xz
stmmac: MDC clock dynamically based on the csr clock input
If a specific clk_csr value is passed from the platform this means that the CSR Clock Range selection cannot be changed at run-time and it is fixed (as reported in the driver documentation). Viceversa the driver will try to set the MDC clock dynamically according to the actual clock input. Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Reviewed-by: Francesco Virlinzi <francesco.virlinzi@st.com> Reviewed-by: David Laight <david.laight@aculab.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/common.h')
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/common.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
index b14829f8085d..9e42b5d32cff 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -97,6 +97,16 @@ struct stmmac_extra_stats {
unsigned long normal_irq_n;
};
+/* CSR Frequency Access Defines*/
+#define CSR_F_35M 35000000
+#define CSR_F_60M 60000000
+#define CSR_F_100M 100000000
+#define CSR_F_150M 150000000
+#define CSR_F_250M 250000000
+#define CSR_F_300M 300000000
+
+#define MAC_CSR_H_FRQ_MASK 0x20
+
#define HASH_TABLE_SIZE 64
#define PAUSE_TIME 0x200