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| author | David S. Miller <davem@davemloft.net> | 2020-12-10 05:51:59 +0300 | 
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2020-12-10 05:51:59 +0300 | 
| commit | dc528d5bcc2daa00940e034bb9922b65b52b5e60 (patch) | |
| tree | 9cc2d08c366e0bb749bfd5104d547de174c8a567 /drivers/net/ethernet/intel/ice/ice_common.c | |
| parent | b8d909375d6fcdc0de9b5f1a7ecee446aeaf5443 (diff) | |
| parent | 5b13886da858d5f0eb9cbd25612e776cb9021262 (diff) | |
| download | linux-dc528d5bcc2daa00940e034bb9922b65b52b5e60.tar.xz | |
Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue
Tony Nguyen says:
====================
100GbE Intel Wired LAN Driver Updates 2020-12-09
This series contains updates to ice driver only.
Bruce changes the allocation of ice_flow_prof_params from stack to heap to
avoid excessive stack usage. Corrects a misleading comment and silences a
sparse warning that is not a problem.
Paul allows for HW initialization to continue if PHY abilities cannot
be obtained.
Jeb removes bypassing FW link override and reading Option ROM and
netlist information for non-E810 devices as this is now available on
other devices.
Nick removes vlan_ena field as this information can be gathered by
checking num_vlan.
Jake combines format strings and debug prints to the same line.
Simon adds a space to fix string concatenation.
v4: Drop ACL patches. Change PHY abilities failure message from debug to
warning.
v3: Fix email address for DaveM and fix character in cover letter
v2: Expand on commit message for patch 3 to show example usage/commands.
    Reduce number of defensive checks being done.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/intel/ice/ice_common.c')
| -rw-r--r-- | drivers/net/ethernet/intel/ice/ice_common.c | 109 | 
1 files changed, 36 insertions, 73 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c index 7db5fd977367..6d7e7dd0ebe2 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.c +++ b/drivers/net/ethernet/intel/ice/ice_common.c @@ -904,8 +904,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)  	/* Query the allocated resources for Tx scheduler */  	status = ice_sched_query_res_alloc(hw);  	if (status) { -		ice_debug(hw, ICE_DBG_SCHED, -			  "Failed to get scheduler allocated resources\n"); +		ice_debug(hw, ICE_DBG_SCHED, "Failed to get scheduler allocated resources\n");  		goto err_unroll_alloc;  	} @@ -925,7 +924,8 @@ enum ice_status ice_init_hw(struct ice_hw *hw)  				     ICE_AQC_REPORT_TOPO_CAP, pcaps, NULL);  	devm_kfree(ice_hw_to_dev(hw), pcaps);  	if (status) -		goto err_unroll_sched; +		dev_warn(ice_hw_to_dev(hw), "Get PHY capabilities failed status = %d, continuing anyway\n", +			 status);  	/* Initialize port_info struct with link information */  	status = ice_aq_get_link_info(hw->port_info, false, NULL, NULL); @@ -1044,8 +1044,7 @@ enum ice_status ice_check_reset(struct ice_hw *hw)  	}  	if (cnt == grst_timeout) { -		ice_debug(hw, ICE_DBG_INIT, -			  "Global reset polling failed to complete.\n"); +		ice_debug(hw, ICE_DBG_INIT, "Global reset polling failed to complete.\n");  		return ICE_ERR_RESET_FAILED;  	} @@ -1063,16 +1062,14 @@ enum ice_status ice_check_reset(struct ice_hw *hw)  	for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) {  		reg = rd32(hw, GLNVM_ULD) & uld_mask;  		if (reg == uld_mask) { -			ice_debug(hw, ICE_DBG_INIT, -				  "Global reset processes done. %d\n", cnt); +			ice_debug(hw, ICE_DBG_INIT, "Global reset processes done. %d\n", cnt);  			break;  		}  		mdelay(10);  	}  	if (cnt == ICE_PF_RESET_WAIT_COUNT) { -		ice_debug(hw, ICE_DBG_INIT, -			  "Wait for Reset Done timed out. GLNVM_ULD = 0x%x\n", +		ice_debug(hw, ICE_DBG_INIT, "Wait for Reset Done timed out. GLNVM_ULD = 0x%x\n",  			  reg);  		return ICE_ERR_RESET_FAILED;  	} @@ -1124,8 +1121,7 @@ static enum ice_status ice_pf_reset(struct ice_hw *hw)  	}  	if (cnt == ICE_PF_RESET_WAIT_COUNT) { -		ice_debug(hw, ICE_DBG_INIT, -			  "PF reset polling failed to complete.\n"); +		ice_debug(hw, ICE_DBG_INIT, "PF reset polling failed to complete.\n");  		return ICE_ERR_RESET_FAILED;  	} @@ -1578,8 +1574,7 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,  		goto ice_acquire_res_exit;  	if (status) -		ice_debug(hw, ICE_DBG_RES, -			  "resource %d acquire type %d failed.\n", res, access); +		ice_debug(hw, ICE_DBG_RES, "resource %d acquire type %d failed.\n", res, access);  	/* If necessary, poll until the current lock owner timeouts */  	timeout = time_left; @@ -1602,11 +1597,9 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,  ice_acquire_res_exit:  	if (status == ICE_ERR_AQ_NO_WORK) {  		if (access == ICE_RES_WRITE) -			ice_debug(hw, ICE_DBG_RES, -				  "resource indicates no work to do.\n"); +			ice_debug(hw, ICE_DBG_RES, "resource indicates no work to do.\n");  		else -			ice_debug(hw, ICE_DBG_RES, -				  "Warning: ICE_ERR_AQ_NO_WORK not expected\n"); +			ice_debug(hw, ICE_DBG_RES, "Warning: ICE_ERR_AQ_NO_WORK not expected\n");  	}  	return status;  } @@ -1792,66 +1785,53 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,  	switch (cap) {  	case ICE_AQC_CAPS_VALID_FUNCTIONS:  		caps->valid_functions = number; -		ice_debug(hw, ICE_DBG_INIT, -			  "%s: valid_functions (bitmap) = %d\n", prefix, +		ice_debug(hw, ICE_DBG_INIT, "%s: valid_functions (bitmap) = %d\n", prefix,  			  caps->valid_functions);  		break;  	case ICE_AQC_CAPS_SRIOV:  		caps->sr_iov_1_1 = (number == 1); -		ice_debug(hw, ICE_DBG_INIT, -			  "%s: sr_iov_1_1 = %d\n", prefix, +		ice_debug(hw, ICE_DBG_INIT, "%s: sr_iov_1_1 = %d\n", prefix,  			  caps->sr_iov_1_1);  		break;  	case ICE_AQC_CAPS_DCB:  		caps->dcb = (number == 1);  		caps->active_tc_bitmap = logical_id;  		caps->maxtc = phys_id; -		ice_debug(hw, ICE_DBG_INIT, -			  "%s: dcb = %d\n", prefix, caps->dcb); -		ice_debug(hw, ICE_DBG_INIT, -			  "%s: active_tc_bitmap = %d\n", prefix, +		ice_debug(hw, ICE_DBG_INIT, "%s: dcb = %d\n", prefix, caps->dcb); +		ice_debug(hw, ICE_DBG_INIT, "%s: active_tc_bitmap = %d\n", prefix,  			  caps->active_tc_bitmap); -		ice_debug(hw, ICE_DBG_INIT, -			  "%s: maxtc = %d\n", prefix, caps->maxtc); +		ice_debug(hw, ICE_DBG_INIT, "%s: maxtc = %d\n", prefix, caps->maxtc);  		break;  	case ICE_AQC_CAPS_RSS:  		caps->rss_table_size = number;  		caps->rss_table_entry_width = logical_id; -		ice_debug(hw, ICE_DBG_INIT, -			  "%s: rss_table_size = %d\n", prefix, +		ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_size = %d\n", prefix,  			  caps->rss_table_size); -		ice_debug(hw, ICE_DBG_INIT, -			  "%s: rss_table_entry_width = %d\n", prefix, +		ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_entry_width = %d\n", prefix,  			  caps->rss_table_entry_width);  		break;  	case ICE_AQC_CAPS_RXQS:  		caps->num_rxq = number;  		caps->rxq_first_id = phys_id; -		ice_debug(hw, ICE_DBG_INIT, -			  "%s: num_rxq = %d\n", prefix, +		ice_debug(hw, ICE_DBG_INIT, "%s: num_rxq = %d\n", prefix,  			  caps->num_rxq); -		ice_debug(hw, ICE_DBG_INIT, -			  "%s: rxq_first_id = %d\n", prefix, +		ice_debug(hw, ICE_DBG_INIT, "%s: rxq_first_id = %d\n", prefix,  			  caps->rxq_first_id);  		break;  	case ICE_AQC_CAPS_TXQS:  		caps->num_txq = number;  		caps->txq_first_id = phys_id; -		ice_debug(hw, ICE_DBG_INIT, -			  "%s: num_txq = %d\n", prefix, +		ice_debug(hw, ICE_DBG_INIT, "%s: num_txq = %d\n", prefix,  			  caps->num_txq); -		ice_debug(hw, ICE_DBG_INIT, -			  "%s: txq_first_id = %d\n", prefix, +		ice_debug(hw, ICE_DBG_INIT, "%s: txq_first_id = %d\n", prefix,  			  caps->txq_first_id);  		break;  	case ICE_AQC_CAPS_MSIX:  		caps->num_msix_vectors = number;  		caps->msix_vector_first_id = phys_id; -		ice_debug(hw, ICE_DBG_INIT, -			  "%s: num_msix_vectors = %d\n", prefix, +		ice_debug(hw, ICE_DBG_INIT, "%s: num_msix_vectors = %d\n", prefix,  			  caps->num_msix_vectors); -		ice_debug(hw, ICE_DBG_INIT, -			  "%s: msix_vector_first_id = %d\n", prefix, +		ice_debug(hw, ICE_DBG_INIT, "%s: msix_vector_first_id = %d\n", prefix,  			  caps->msix_vector_first_id);  		break;  	case ICE_AQC_CAPS_PENDING_NVM_VER: @@ -1904,8 +1884,7 @@ ice_recalc_port_limited_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps)  	if (hw->dev_caps.num_funcs > 4) {  		/* Max 4 TCs per port */  		caps->maxtc = 4; -		ice_debug(hw, ICE_DBG_INIT, -			  "reducing maxtc to %d (based on #ports)\n", +		ice_debug(hw, ICE_DBG_INIT, "reducing maxtc to %d (based on #ports)\n",  			  caps->maxtc);  	}  } @@ -1973,11 +1952,9 @@ ice_parse_fdir_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p)  		GLQF_FD_SIZE_FD_BSIZE_S;  	func_p->fd_fltr_best_effort = val; -	ice_debug(hw, ICE_DBG_INIT, -		  "func caps: fd_fltr_guar = %d\n", +	ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_guar = %d\n",  		  func_p->fd_fltr_guar); -	ice_debug(hw, ICE_DBG_INIT, -		  "func caps: fd_fltr_best_effort = %d\n", +	ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_best_effort = %d\n",  		  func_p->fd_fltr_best_effort);  } @@ -2026,8 +2003,7 @@ ice_parse_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,  		default:  			/* Don't list common capabilities as unknown */  			if (!found) -				ice_debug(hw, ICE_DBG_INIT, -					  "func caps: unknown capability[%d]: 0x%x\n", +				ice_debug(hw, ICE_DBG_INIT, "func caps: unknown capability[%d]: 0x%x\n",  					  i, cap);  			break;  		} @@ -2160,8 +2136,7 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,  		default:  			/* Don't list common capabilities as unknown */  			if (!found) -				ice_debug(hw, ICE_DBG_INIT, -					  "dev caps: unknown capability[%d]: 0x%x\n", +				ice_debug(hw, ICE_DBG_INIT, "dev caps: unknown capability[%d]: 0x%x\n",  					  i, cap);  			break;  		} @@ -2618,8 +2593,7 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,  	/* Ensure that only valid bits of cfg->caps can be turned on. */  	if (cfg->caps & ~ICE_AQ_PHY_ENA_VALID_MASK) { -		ice_debug(hw, ICE_DBG_PHY, -			  "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n", +		ice_debug(hw, ICE_DBG_PHY, "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n",  			  cfg->caps);  		cfg->caps &= ICE_AQ_PHY_ENA_VALID_MASK; @@ -3067,8 +3041,7 @@ enum ice_status ice_get_link_status(struct ice_port_info *pi, bool *link_up)  		status = ice_update_link_info(pi);  		if (status) -			ice_debug(pi->hw, ICE_DBG_LINK, -				  "get link status error, status = %d\n", +			ice_debug(pi->hw, ICE_DBG_LINK, "get link status error, status = %d\n",  				  status);  	} @@ -3793,8 +3766,7 @@ ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,  		 * of the endianness of the machine.  		 */  		if (ce_info[f].width > (ce_info[f].size_of * BITS_PER_BYTE)) { -			ice_debug(hw, ICE_DBG_QCTX, -				  "Field %d width of %d bits larger than size of %d byte(s) ... skipping write\n", +			ice_debug(hw, ICE_DBG_QCTX, "Field %d width of %d bits larger than size of %d byte(s) ... skipping write\n",  				  f, ce_info[f].width, ce_info[f].size_of);  			continue;  		} @@ -4261,10 +4233,6 @@ ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,   */  bool ice_fw_supports_link_override(struct ice_hw *hw)  { -	/* Currently, only supported for E810 devices */ -	if (hw->mac_type != ICE_MAC_E810) -		return false; -  	if (hw->api_maj_ver == ICE_FW_API_LINK_OVERRIDE_MAJ) {  		if (hw->api_min_ver > ICE_FW_API_LINK_OVERRIDE_MIN)  			return true; @@ -4296,8 +4264,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,  	status = ice_get_pfa_module_tlv(hw, &tlv, &tlv_len,  					ICE_SR_LINK_DEFAULT_OVERRIDE_PTR);  	if (status) { -		ice_debug(hw, ICE_DBG_INIT, -			  "Failed to read link override TLV.\n"); +		ice_debug(hw, ICE_DBG_INIT, "Failed to read link override TLV.\n");  		return status;  	} @@ -4308,8 +4275,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,  	/* link options first */  	status = ice_read_sr_word(hw, tlv_start, &buf);  	if (status) { -		ice_debug(hw, ICE_DBG_INIT, -			  "Failed to read override link options.\n"); +		ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");  		return status;  	}  	ldo->options = buf & ICE_LINK_OVERRIDE_OPT_M; @@ -4320,8 +4286,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,  	offset = tlv_start + ICE_SR_PFA_LINK_OVERRIDE_FEC_OFFSET;  	status = ice_read_sr_word(hw, offset, &buf);  	if (status) { -		ice_debug(hw, ICE_DBG_INIT, -			  "Failed to read override phy config.\n"); +		ice_debug(hw, ICE_DBG_INIT, "Failed to read override phy config.\n");  		return status;  	}  	ldo->fec_options = buf & ICE_LINK_OVERRIDE_FEC_OPT_M; @@ -4331,8 +4296,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,  	for (i = 0; i < ICE_SR_PFA_LINK_OVERRIDE_PHY_WORDS; i++) {  		status = ice_read_sr_word(hw, (offset + i), &buf);  		if (status) { -			ice_debug(hw, ICE_DBG_INIT, -				  "Failed to read override link options.\n"); +			ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");  			return status;  		}  		/* shift 16 bits at a time to fill 64 bits */ @@ -4345,8 +4309,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,  	for (i = 0; i < ICE_SR_PFA_LINK_OVERRIDE_PHY_WORDS; i++) {  		status = ice_read_sr_word(hw, (offset + i), &buf);  		if (status) { -			ice_debug(hw, ICE_DBG_INIT, -				  "Failed to read override link options.\n"); +			ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");  			return status;  		}  		/* shift 16 bits at a time to fill 64 bits */  | 
