diff options
author | Daode Huang <huangdaode@hisilicon.com> | 2016-06-21 06:56:38 +0300 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2016-06-21 11:51:56 +0300 |
commit | f28f34cdefe5323468eab79f23d792b014b7d758 (patch) | |
tree | c407fc14b02323878044657a398081621bb5a6b0 /drivers/net/ethernet/hisilicon | |
parent | 8ae7b8a599383b8d7022df52732e68c0888c0d5e (diff) | |
download | linux-f28f34cdefe5323468eab79f23d792b014b7d758.tar.xz |
net: hns: change the default coalesce usecs
The default coalesce timeout is 3us, which is will cause CPU
usage is too high. This patch change it to 50us in order to reduce
CPU usage and the value makes sure network latency also meets requirement.
Signed-off-by: Daode Huang <huangdaode@hisilicon.com>
Signed-off-by: Yisen Zhuang <Yisen.Zhuang@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/hisilicon')
-rw-r--r-- | drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c | 2 | ||||
-rw-r--r-- | drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c index 3ce24097fcf4..ef1107777c08 100644 --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c @@ -540,7 +540,7 @@ int hns_rcb_set_coalesce_usecs( } if (timeout > HNS_RCB_MAX_COALESCED_USECS) { dev_err(rcb_common->dsaf_dev->dev, - "error: not support coalesce %dus!\n", timeout); + "error: coalesce_usecs setting supports 0~1023us\n"); return -EINVAL; } hns_rcb_set_port_timeout(rcb_common, port_idx, timeout); diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h index bd54dac82ee0..99b4e1ba0a94 100644 --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h @@ -40,7 +40,7 @@ struct rcb_common_cb; #define HNS_RCB_DEF_COALESCED_FRAMES 50 #define HNS_RCB_CLK_FREQ_MHZ 350 #define HNS_RCB_MAX_COALESCED_USECS 0x3ff -#define HNS_RCB_DEF_COALESCED_USECS 3 +#define HNS_RCB_DEF_COALESCED_USECS 50 #define HNS_RCB_COMMON_ENDIAN 1 |