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authorRasmus Villemoes <rasmus.villemoes@prevas.dk>2019-06-04 10:34:29 +0300
committerDavid S. Miller <davem@davemloft.net>2019-06-05 06:07:57 +0300
commita528e5be6b5f8026eda029b03340dcfa23c70824 (patch)
tree2ab432dc73b7a96b1391f36a9aa2f73b37d65487 /drivers/net/dsa/mv88e6xxx/port.h
parent855cdfde54315762763fb833ad952355119dd3b0 (diff)
downloadlinux-a528e5be6b5f8026eda029b03340dcfa23c70824.tar.xz
net: dsa: mv88e6xxx: implement port_set_speed for mv88e6250
The data sheet also mentions the possibility of selecting 200 Mbps for the MII ports (ports 5 and 6) by setting the ForceSpd field to 0x2 (aka MV88E6065_PORT_MAC_CTL_SPEED_200). However, there's a note that "actual speed is determined by bit 8 above", and flipping back a page, one finds that bits 13:8 are reserved... So without further information on what bit 8 means, let's stick to supporting just 10 and 100 Mbps on all ports. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/mv88e6xxx/port.h')
-rw-r--r--drivers/net/dsa/mv88e6xxx/port.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/port.h b/drivers/net/dsa/mv88e6xxx/port.h
index 39c85e98fb92..1957e3e1cf47 100644
--- a/drivers/net/dsa/mv88e6xxx/port.h
+++ b/drivers/net/dsa/mv88e6xxx/port.h
@@ -279,6 +279,7 @@ int mv88e6xxx_port_set_duplex(struct mv88e6xxx_chip *chip, int port, int dup);
int mv88e6065_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
int mv88e6185_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
+int mv88e6250_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
int mv88e6341_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
int mv88e6352_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
int mv88e6390_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);