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authorVivien Didelot <vivien.didelot@savoirfairelinux.com>2016-05-09 20:22:46 +0300
committerDavid S. Miller <davem@davemloft.net>2016-05-09 21:26:10 +0300
commit936f234a9624dbce9f723cbb24f135c60f76c148 (patch)
tree4d27ad21e3e985a3a00e73dbe39239a12a1b3ed8 /drivers/net/dsa/mv88e6xxx.h
parent2306251341bda39f1c3260bb96479db4dff2fe95 (diff)
downloadlinux-936f234a9624dbce9f723cbb24f135c60f76c148.tar.xz
net: dsa: mv88e6xxx: factorize bridge support
Add MV88E6XXX_FLAG_PORTSTATE and MV88E6XXX_FLAG_VLANTABLE flags to identify switch models with required 802.1D operations. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/mv88e6xxx.h')
-rw-r--r--drivers/net/dsa/mv88e6xxx.h38
1 files changed, 30 insertions, 8 deletions
diff --git a/drivers/net/dsa/mv88e6xxx.h b/drivers/net/dsa/mv88e6xxx.h
index b99e0905992a..d15e0b3dffd3 100644
--- a/drivers/net/dsa/mv88e6xxx.h
+++ b/drivers/net/dsa/mv88e6xxx.h
@@ -360,6 +360,11 @@ enum mv88e6xxx_cap {
*/
MV88E6XXX_CAP_EEPROM,
+ /* Port State Filtering for 802.1D Spanning Tree.
+ * See PORT_CONTROL_STATE_* values in the PORT_CONTROL register.
+ */
+ MV88E6XXX_CAP_PORTSTATE,
+
/* PHY Polling Unit.
* See GLOBAL_CONTROL_PPU_ENABLE and GLOBAL_STATUS_PPU_POLLING.
*/
@@ -383,50 +388,67 @@ enum mv88e6xxx_cap {
*/
MV88E6XXX_CAP_TEMP,
MV88E6XXX_CAP_TEMP_LIMIT,
+
+ /* In-chip Port Based VLANs.
+ * Each port VLANTable register (see PORT_BASE_VLAN) is used to restrict
+ * the output (or egress) ports to which it is allowed to send frames.
+ */
+ MV88E6XXX_CAP_VLANTABLE,
};
/* Bitmask of capabilities */
#define MV88E6XXX_FLAG_EEE BIT(MV88E6XXX_CAP_EEE)
#define MV88E6XXX_FLAG_EEPROM BIT(MV88E6XXX_CAP_EEPROM)
+#define MV88E6XXX_FLAG_PORTSTATE BIT(MV88E6XXX_CAP_PORTSTATE)
#define MV88E6XXX_FLAG_PPU BIT(MV88E6XXX_CAP_PPU)
#define MV88E6XXX_FLAG_SMI_PHY BIT(MV88E6XXX_CAP_SMI_PHY)
#define MV88E6XXX_FLAG_SWITCH_MAC BIT(MV88E6XXX_CAP_SWITCH_MAC_WOL_WOF)
#define MV88E6XXX_FLAG_TEMP BIT(MV88E6XXX_CAP_TEMP)
#define MV88E6XXX_FLAG_TEMP_LIMIT BIT(MV88E6XXX_CAP_TEMP_LIMIT)
+#define MV88E6XXX_FLAG_VLANTABLE BIT(MV88E6XXX_CAP_VLANTABLE)
#define MV88E6XXX_FLAGS_FAMILY_6095 \
- MV88E6XXX_FLAG_PPU
+ (MV88E6XXX_FLAG_PPU | \
+ MV88E6XXX_FLAG_VLANTABLE)
#define MV88E6XXX_FLAGS_FAMILY_6097 \
- MV88E6XXX_FLAG_PPU
+ (MV88E6XXX_FLAG_PPU | \
+ MV88E6XXX_FLAG_VLANTABLE)
#define MV88E6XXX_FLAGS_FAMILY_6165 \
(MV88E6XXX_FLAG_SWITCH_MAC | \
MV88E6XXX_FLAG_TEMP)
#define MV88E6XXX_FLAGS_FAMILY_6185 \
- MV88E6XXX_FLAG_PPU
+ (MV88E6XXX_FLAG_PPU | \
+ MV88E6XXX_FLAG_VLANTABLE)
#define MV88E6XXX_FLAGS_FAMILY_6320 \
(MV88E6XXX_FLAG_EEE | \
MV88E6XXX_FLAG_EEPROM | \
+ MV88E6XXX_FLAG_PORTSTATE | \
MV88E6XXX_FLAG_SMI_PHY | \
MV88E6XXX_FLAG_SWITCH_MAC | \
MV88E6XXX_FLAG_TEMP | \
- MV88E6XXX_FLAG_TEMP_LIMIT)
+ MV88E6XXX_FLAG_TEMP_LIMIT | \
+ MV88E6XXX_FLAG_VLANTABLE)
#define MV88E6XXX_FLAGS_FAMILY_6351 \
- (MV88E6XXX_FLAG_SMI_PHY | \
+ (MV88E6XXX_FLAG_PORTSTATE | \
+ MV88E6XXX_FLAG_SMI_PHY | \
MV88E6XXX_FLAG_SWITCH_MAC | \
- MV88E6XXX_FLAG_TEMP)
+ MV88E6XXX_FLAG_TEMP | \
+ MV88E6XXX_FLAG_VLANTABLE)
#define MV88E6XXX_FLAGS_FAMILY_6352 \
(MV88E6XXX_FLAG_EEE | \
MV88E6XXX_FLAG_EEPROM | \
- MV88E6XXX_FLAG_SMI_PHY | \
+ MV88E6XXX_FLAG_PORTSTATE | \
+ MV88E6XXX_FLAG_SMI_PHY | \
MV88E6XXX_FLAG_SWITCH_MAC | \
MV88E6XXX_FLAG_TEMP | \
- MV88E6XXX_FLAG_TEMP_LIMIT)
+ MV88E6XXX_FLAG_TEMP_LIMIT | \
+ MV88E6XXX_FLAG_VLANTABLE)
struct mv88e6xxx_info {
enum mv88e6xxx_family family;