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authorBruce Allan <bruce.w.allan@intel.com>2010-01-13 04:52:49 +0300
committerDavid S. Miller <davem@davemloft.net>2010-01-14 04:12:46 +0300
commitfddaa1aff881c98f524221236af98ce70dcd04cf (patch)
tree49f21c354f986851ab3650d4a9d274b1ed34cc8e /drivers/net/cxgb3
parent8c47eaa76600cebc4869a42abb4568925ade6c47 (diff)
downloadlinux-fddaa1aff881c98f524221236af98ce70dcd04cf.tar.xz
e1000e: MDIO slow mode should always be done for 82577
A previous 82577 workaround that set the MDIO access speed to slow mode for every PHY register read/write when the cable is unplugged should instead set the access mode to always be slow before any PHY register access. Since the mode bit gets cleared when the PHY is reset, set the mode after every PHY reset. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/cxgb3')
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