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authorOmer Shpigelman <oshpigelman@habana.ai>2020-02-06 14:16:53 +0300
committerOded Gabbay <oded.gabbay@gmail.com>2020-03-24 11:54:16 +0300
commit0c002ceb39feb26c53ed55ae490b7e6d3b0e6904 (patch)
tree32e835afd2ab6616589eaa38506c1cc13da87984 /drivers/misc
parent7491c036cb7975543139756e9c7d00ea6bdd139d (diff)
downloadlinux-0c002ceb39feb26c53ed55ae490b7e6d3b0e6904.tar.xz
habanalabs: fix DDR bar address setting
DRAM_PHYS_BASE is already taken into account in MMU_PAGE_TABLES_ADDR. Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Diffstat (limited to 'drivers/misc')
-rw-r--r--drivers/misc/habanalabs/goya/goya.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/misc/habanalabs/goya/goya.c b/drivers/misc/habanalabs/goya/goya.c
index 74785ccd2cb1..f634e9c5cad9 100644
--- a/drivers/misc/habanalabs/goya/goya.c
+++ b/drivers/misc/habanalabs/goya/goya.c
@@ -2575,8 +2575,7 @@ static int goya_hw_init(struct hl_device *hdev)
* After CPU initialization is finished, change DDR bar mapping inside
* iATU to point to the start address of the MMU page tables
*/
- if (goya_set_ddr_bar_base(hdev, DRAM_PHYS_BASE +
- (MMU_PAGE_TABLES_ADDR &
+ if (goya_set_ddr_bar_base(hdev, (MMU_PAGE_TABLES_ADDR &
~(prop->dram_pci_bar_size - 0x1ull))) == U64_MAX) {
dev_err(hdev->dev,
"failed to map DDR bar to MMU page tables\n");