diff options
| author | Tony Lindgren <tony@atomide.com> | 2017-04-04 06:15:54 +0300 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2017-04-27 11:25:07 +0300 |
| commit | ac89473213c602b98172d92e40f5e78032b1aba0 (patch) | |
| tree | ed3cc6fe23d2c778ff7f3cd34c683ac7f3829f50 /drivers/mfd/motorola-cpcap.c | |
| parent | 4d5db2a3a207451a8b11802c4d5f45a8931d996c (diff) | |
| download | linux-ac89473213c602b98172d92e40f5e78032b1aba0.tar.xz | |
mfd: cpcap: Fix interrupt to use level interrupt
I made a mistake assuming the device tree configuration for interrupt
triggering was somehow passed to the SPI device but it's not.
In the Motorola Linux kernel tree CPCAP PMIC is configured as a rising
edge triggered interrupt, but then then it's interrupt handler keeps
looping until the GPIO line goes down. So the CPCAP interrupt is clearly
a level interrupt and not an edge interrupt.
Earlier when I tried to configure it as level interrupt using the
device tree, I did not account that the triggering only gets passed
to the SPI core and it also needs to be specified in the CPCAP driver
when we do devm_regmap_add_irq_chip().
Fixes: 56e1d40d3bea ("mfd: cpcap: Add minimal support")
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers/mfd/motorola-cpcap.c')
| -rw-r--r-- | drivers/mfd/motorola-cpcap.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mfd/motorola-cpcap.c b/drivers/mfd/motorola-cpcap.c index a9097efcefa5..cd93f5c7b063 100644 --- a/drivers/mfd/motorola-cpcap.c +++ b/drivers/mfd/motorola-cpcap.c @@ -154,7 +154,7 @@ static int cpcap_init_irq_chip(struct cpcap_ddata *cpcap, int irq_chip, ret = devm_regmap_add_irq_chip(&cpcap->spi->dev, cpcap->regmap, cpcap->spi->irq, - IRQF_TRIGGER_RISING | + irq_get_trigger_type(cpcap->spi->irq) | IRQF_SHARED, -1, chip, &cpcap->irqdata[irq_chip]); if (ret) { |