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authorDave Gerlach <d-gerlach@ti.com>2019-04-02 19:57:42 +0300
committerTony Lindgren <tony@atomide.com>2019-04-09 18:31:51 +0300
commit6c110561eb2d4d1496961c13a92f96f29eea7c72 (patch)
tree8c1237a3dbc0f2bafb8df589b2f9c1dbf8c04a69 /drivers/memory/ti-emif-pm.c
parent9e98c678c2d6ae3a17cb2de55d17f69dddaa231b (diff)
downloadlinux-6c110561eb2d4d1496961c13a92f96f29eea7c72.tar.xz
memory: ti-emif-sram: Add ti_emif_run_hw_leveling for DDR3 hardware leveling
In certain situations, such as when returning from low power modes, the EMIF must re-run hardware leveling to properly restore DDR3 access. This is accomplished by introducing a new ti-emif-sram-pm call, ti_emif_run_hw_leveling, to check if DDR3 is in use and if so, trigger the full write and read leveling processes. Suggested-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/memory/ti-emif-pm.c')
-rw-r--r--drivers/memory/ti-emif-pm.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/memory/ti-emif-pm.c b/drivers/memory/ti-emif-pm.c
index 2250d03ea17f..ab07aa163138 100644
--- a/drivers/memory/ti-emif-pm.c
+++ b/drivers/memory/ti-emif-pm.c
@@ -138,6 +138,9 @@ static int ti_emif_alloc_sram(struct device *dev,
emif_data->pm_functions.exit_sr =
sram_resume_address(emif_data,
(unsigned long)ti_emif_exit_sr);
+ emif_data->pm_functions.run_hw_leveling =
+ sram_resume_address(emif_data,
+ (unsigned long)ti_emif_run_hw_leveling);
emif_data->pm_data.regs_virt =
(struct emif_regs_amx3 *)emif_data->ti_emif_sram_data_virt;