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authorConor Dooley <conor.dooley@microchip.com>2023-01-13 23:54:35 +0300
committerLey Foon Tan <leyfoon.tan@starfivetech.com>2023-12-04 06:00:18 +0300
commit76bebcb46be0923cfc6c583cf0ebe8d96bbe6e0c (patch)
tree47a9537654a325c074907993f5bc90761f74c55d /drivers/media
parent5fec9b5043179130d0cc3d54ec3f95c662f85a25 (diff)
downloadlinux-76bebcb46be0923cfc6c583cf0ebe8d96bbe6e0c.tar.xz
dt-bindings: riscv: add SBI PMU event mappings
[ Upstream commit 7e38085d9c59b6d07c1986ea43d046d457dcf646 ] The SBI PMU extension requires a firmware to be aware of the event to counter/mhpmevent mappings supported by the hardware. OpenSBI may use DeviceTree to describe the PMU mappings. This binding is currently described in markdown in OpenSBI (since v1.0 in Dec 2021) & used by QEMU since v7.2.0. Import the binding for use while validating dtb dumps from QEMU and upcoming hardware (eg JH7110 SoC) that will make use of the event mapping. Link: https://github.com/riscv-software-src/opensbi/blob/master/docs/pmu_support.md Link: https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/riscv-sbi.adoc # Performance Monitoring Unit Extension Co-developed-by: Atish Patra <atishp@rivosinc.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230113205435.122712-1-conor@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
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