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authorDavid Woodhouse <David.Woodhouse@intel.com>2010-05-10 17:32:46 +0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-05-10 17:32:46 +0400
commit0ae28a35bcb7984838acbf28bfba9c030f8b74f0 (patch)
tree4f449d929b5df9e126e839f388ff0fd2b52028a0 /drivers/media/video/mx1_camera.c
parent6f1f3d0ab5c3eeea9f04486481c25e9afdfa26c5 (diff)
parentb57f95a38233a2e73b679bea4a5453a1cc2a1cc9 (diff)
downloadlinux-0ae28a35bcb7984838acbf28bfba9c030f8b74f0.tar.xz
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts: drivers/mtd/mtdcore.c Pull in the bdi fixes and ARM platform changes that other outstanding patches depend on.
Diffstat (limited to 'drivers/media/video/mx1_camera.c')
-rw-r--r--drivers/media/video/mx1_camera.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/media/video/mx1_camera.c b/drivers/media/video/mx1_camera.c
index c167cc3de492..34a66019190e 100644
--- a/drivers/media/video/mx1_camera.c
+++ b/drivers/media/video/mx1_camera.c
@@ -29,6 +29,7 @@
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
+#include <linux/slab.h>
#include <linux/time.h>
#include <linux/version.h>
#include <linux/videodev2.h>
@@ -48,8 +49,6 @@
/*
* CSI registers
*/
-#define DMA_CCR(x) (0x8c + ((x) << 6)) /* Control Registers */
-#define DMA_DIMR 0x08 /* Interrupt mask Register */
#define CSICR1 0x00 /* CSI Control Register 1 */
#define CSISR 0x08 /* CSI Status Register */
#define CSIRXR 0x10 /* CSI RxFIFO Register */
@@ -783,7 +782,7 @@ static int __init mx1_camera_probe(struct platform_device *pdev)
pcdev);
imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
- IMX_DMA_MEMSIZE_32, DMA_REQ_CSI_R, 0);
+ IMX_DMA_MEMSIZE_32, MX1_DMA_REQ_CSI_R, 0);
/* burst length : 16 words = 64 bytes */
imx_dma_config_burstlen(pcdev->dma_chan, 0);
@@ -797,8 +796,8 @@ static int __init mx1_camera_probe(struct platform_device *pdev)
set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
&mx1_camera_sof_fiq_start);
- regs.ARM_r8 = DMA_BASE + DMA_DIMR;
- regs.ARM_r9 = DMA_BASE + DMA_CCR(pcdev->dma_chan);
+ regs.ARM_r8 = (long)MX1_DMA_DIMR;
+ regs.ARM_r9 = (long)MX1_DMA_CCR(pcdev->dma_chan);
regs.ARM_r10 = (long)pcdev->base + CSICR1;
regs.ARM_fp = (long)pcdev->base + CSISR;
regs.ARM_sp = 1 << pcdev->dma_chan;