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authorSakari Ailus <sakari.ailus@linux.intel.com>2020-06-18 14:23:26 +0300
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2020-12-07 17:37:55 +0300
commit6aadbff9d459d4e4ebaedf19d50b0f057574f756 (patch)
treee6ea3aea7ee08a9624b57439f8b8ac42449d4d84 /drivers/media/i2c
parent9c1a0d9e9188e7dc2f8f723ce87885e17636ede8 (diff)
downloadlinux-6aadbff9d459d4e4ebaedf19d50b0f057574f756.tar.xz
media: ccs-pll: Remove parallel bus support
The parallel bus PLL calculation has no users. Remove it. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media/i2c')
-rw-r--r--drivers/media/i2c/ccs-pll.c5
-rw-r--r--drivers/media/i2c/ccs-pll.h14
2 files changed, 4 insertions, 15 deletions
diff --git a/drivers/media/i2c/ccs-pll.c b/drivers/media/i2c/ccs-pll.c
index 22e29127804a..da97a2b91717 100644
--- a/drivers/media/i2c/ccs-pll.c
+++ b/drivers/media/i2c/ccs-pll.c
@@ -435,11 +435,6 @@ int ccs_pll_calculate(struct device *dev, const struct ccs_pll_limits *lim,
op_pll_fr->pll_op_clk_freq_hz = pll->link_freq * 2
* (pll->csi2.lanes / lane_op_clock_ratio);
break;
- case CCS_PLL_BUS_TYPE_PARALLEL:
- op_pll_fr->pll_op_clk_freq_hz = pll->link_freq * pll->bits_per_pixel
- / DIV_ROUND_UP(pll->bits_per_pixel,
- pll->parallel.bus_width);
- break;
default:
return -EINVAL;
}
diff --git a/drivers/media/i2c/ccs-pll.h b/drivers/media/i2c/ccs-pll.h
index 03b1d8d11423..578c9272688a 100644
--- a/drivers/media/i2c/ccs-pll.h
+++ b/drivers/media/i2c/ccs-pll.h
@@ -13,8 +13,7 @@
#define CCS_PLL_H
/* CSI-2 or CCP-2 */
-#define CCS_PLL_BUS_TYPE_CSI2 0x00
-#define CCS_PLL_BUS_TYPE_PARALLEL 0x01
+#define CCS_PLL_BUS_TYPE_CSI2 0x00
/* op pix clock is for all lanes in total normally */
#define CCS_PLL_FLAG_OP_PIX_CLOCK_PER_LANE (1 << 0)
@@ -37,14 +36,9 @@ struct ccs_pll_branch_bk {
struct ccs_pll {
/* input values */
uint8_t bus_type;
- union {
- struct {
- uint8_t lanes;
- } csi2;
- struct {
- uint8_t bus_width;
- } parallel;
- };
+ struct {
+ uint8_t lanes;
+ } csi2;
unsigned long flags;
uint8_t binning_horizontal;
uint8_t binning_vertical;