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authorMartin Bugge <marbugge@cisco.com>2014-01-24 17:50:06 +0400
committerMauro Carvalho Chehab <m.chehab@samsung.com>2014-02-04 15:57:36 +0400
commitce2d2b2d7a764cc9481efd896f119799a4aeafaf (patch)
tree2617bd11e1a9ec71be25d8c54f01cafdf08115d3 /drivers/media/i2c/adv7842.c
parentb60908a4e5164835678728bf185af9807e0e4560 (diff)
downloadlinux-ce2d2b2d7a764cc9481efd896f119799a4aeafaf.tar.xz
[media] adv7842: platform-data for Hotplug Active (HPA) manual/auto
This applies to HDMI-map register 0x69. So far we have been using HPA manual mode. This way we had control of HPA which could be set after EDID had been programmed. Using a Mac Mini with mini-displayport to DVI-D converter as source caused the adv7842 to lock up and fail to detect any further signals. After experimenting with different configurations it was found that using the HPA auto mode and in addition letting RX-termination be controlled by HPA prevented this error from occuring. I was not able to re-create this problem on the adv7604. Signed-off-by: Martin Bugge <marbugge@cisco.com> Cc: Mats Randgaard <matrandg@cisco.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'drivers/media/i2c/adv7842.c')
-rw-r--r--drivers/media/i2c/adv7842.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c
index 209b1753b701..e04fe3f80383 100644
--- a/drivers/media/i2c/adv7842.c
+++ b/drivers/media/i2c/adv7842.c
@@ -2693,9 +2693,15 @@ static int adv7842_core_init(struct v4l2_subdev *sd)
/* disable I2C access to internal EDID ram from HDMI DDC ports */
rep_write_and_or(sd, 0x77, 0xf3, 0x00);
- hdmi_write(sd, 0x69, 0xa3); /* HPA manual */
- /* HPA disable on port A and B */
- io_write_and_or(sd, 0x20, 0xcf, 0x00);
+ if (pdata->hpa_auto) {
+ /* HPA auto, HPA 0.5s after Edid set and Cable detect */
+ hdmi_write(sd, 0x69, 0x5c);
+ } else {
+ /* HPA manual */
+ hdmi_write(sd, 0x69, 0xa3);
+ /* HPA disable on port A and B */
+ io_write_and_or(sd, 0x20, 0xcf, 0x00);
+ }
/* LLC */
io_write(sd, 0x19, 0x80 | pdata->llc_dll_phase);