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author | Christophe Leroy <christophe.leroy@c-s.fr> | 2019-05-14 12:05:13 +0300 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2019-07-04 18:35:10 +0300 |
commit | 1cfb725fb1899dc6fdc88f8b5354a65e8ad260c6 (patch) | |
tree | 1e1a4bf185f110b05a2f47b7ed9533d3893d81d1 /drivers/macintosh | |
parent | 6c5875843b87c3adea2beade9d1b8b3d4523900a (diff) | |
download | linux-1cfb725fb1899dc6fdc88f8b5354a65e8ad260c6.tar.xz |
powerpc/64: flush_inval_dcache_range() becomes flush_dcache_range()
On most arches having function flush_dcache_range(), including PPC32,
this function does a writeback and invalidation of the cache bloc.
On PPC64, flush_dcache_range() only does a writeback while
flush_inval_dcache_range() does the invalidation in addition.
In addition it looks like within arch/powerpc/, there are no PPC64
platforms using flush_dcache_range()
This patch drops the existing 64 bits version of flush_dcache_range()
and renames flush_inval_dcache_range() into flush_dcache_range().
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'drivers/macintosh')
-rw-r--r-- | drivers/macintosh/smu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/macintosh/smu.c b/drivers/macintosh/smu.c index 6a844125cf2d..97758eed03f2 100644 --- a/drivers/macintosh/smu.c +++ b/drivers/macintosh/smu.c @@ -133,7 +133,7 @@ static void smu_start_cmd(void) /* Flush command and data to RAM */ faddr = (unsigned long)smu->cmd_buf; fend = faddr + smu->cmd_buf->length + 2; - flush_inval_dcache_range(faddr, fend); + flush_dcache_range(faddr, fend); /* We also disable NAP mode for the duration of the command @@ -195,7 +195,7 @@ static irqreturn_t smu_db_intr(int irq, void *arg) * reply length (it's only 2 cache lines anyway) */ faddr = (unsigned long)smu->cmd_buf; - flush_inval_dcache_range(faddr, faddr + 256); + flush_dcache_range(faddr, faddr + 256); /* Now check ack */ ack = (~cmd->cmd) & 0xff; |