diff options
| author | Andrew Bresticker <abrestic@chromium.org> | 2014-09-19 01:47:20 +0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 09:44:55 +0300 |
| commit | 5561c9e467a91c99ae1d0714e78ad26a2d14c744 (patch) | |
| tree | 0ef09c7b450c3cf5eed04b2598ba3ab5376829a1 /drivers/irqchip/irq-mips-gic.c | |
| parent | 8a19b8f19429b86c91e10745bc131bc600e60ede (diff) | |
| download | linux-5561c9e467a91c99ae1d0714e78ad26a2d14c744.tar.xz | |
irqchip: mips-gic: Remove platform irq_ack/irq_eoi callbacks
There's no need for platforms to have their own GIC irq_ack/irq_eoi
callbacks. irq_ack need only clear the GIC's edge detector on
edge-triggered interrupts and there's no need at all for irq_eoi.
Also get rid of the mask_ack callback since it's not necessary either.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7809/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'drivers/irqchip/irq-mips-gic.c')
| -rw-r--r-- | drivers/irqchip/irq-mips-gic.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c index 582883069ef6..76658660ea4f 100644 --- a/drivers/irqchip/irq-mips-gic.c +++ b/drivers/irqchip/irq-mips-gic.c @@ -237,6 +237,13 @@ static void gic_unmask_irq(struct irq_data *d) GIC_SET_INTR_MASK(d->irq - gic_irq_base); } +static void gic_ack_irq(struct irq_data *d) +{ + /* Clear edge detector */ + if (gic_irq_flags[d->irq - gic_irq_base] & GIC_TRIG_EDGE) + GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), d->irq - gic_irq_base); +} + #ifdef CONFIG_SMP static DEFINE_SPINLOCK(gic_lock); @@ -272,11 +279,9 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask, static struct irq_chip gic_irq_controller = { .name = "MIPS GIC", - .irq_ack = gic_irq_ack, + .irq_ack = gic_ack_irq, .irq_mask = gic_mask_irq, - .irq_mask_ack = gic_mask_irq, .irq_unmask = gic_unmask_irq, - .irq_eoi = gic_finish_irq, #ifdef CONFIG_SMP .irq_set_affinity = gic_set_affinity, #endif |