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| author | Linus Walleij <linus.walleij@linaro.org> | 2015-10-24 01:15:52 +0300 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2015-12-16 18:30:50 +0300 |
| commit | 8673c1d7e8f0cc69b84c1c3356d869b74385fca7 (patch) | |
| tree | a5f10a5022d6dbf45580519d4b547f9f2df0a762 /drivers/irqchip/irq-gic.c | |
| parent | 126aebd0557815f0d982c81a3ed9cd251f443de6 (diff) | |
| download | linux-8673c1d7e8f0cc69b84c1c3356d869b74385fca7.tar.xz | |
irqchip/gic: Support RealView variant setup
The ARM RealView PB11MPCore reference design has some special
bits in a system controller register to set up the GIC in one
of three modes: legacy, new with DCC, new without DCC. The
register is also used to enable FIQ.
Since the platform will not boot unless this register is set
up to "new with DCC" mode, we need a special quirk to be
compiled-in for the RealView platforms.
If we find the right compatible string on the GIC TestChip,
we enable this quirk by looking up the system controller and
enabling the special bits.
We depend on the CONFIG_REALVIEW_DT Kconfig symbol as the old
boardfile code has the same fix hardcoded, and this is only
needed for the attempts to modernize the RealView code using
device tree.
After fixing this, the PB11MPCore boots with device tree
only.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/irq-gic.c')
| -rw-r--r-- | drivers/irqchip/irq-gic.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index abf2ffaed392..9736a1b9d7fd 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -1196,7 +1196,7 @@ static bool gic_check_eoimode(struct device_node *node, void __iomem **base) return true; } -static int __init +int __init gic_of_init(struct device_node *node, struct device_node *parent) { void __iomem *cpu_base; |