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author | Marc Zyngier <marc.zyngier@arm.com> | 2018-05-27 18:39:55 +0300 |
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committer | Marc Zyngier <marc.zyngier@arm.com> | 2018-07-16 16:22:19 +0300 |
commit | 147c8f376e5526ebfaf2827734916414db52a3c4 (patch) | |
tree | e119d83c2ae863e4e8277aad6f42e1111a104d49 /drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c | |
parent | fe8e93504ce870cb60b5dca97d13d861a53d7353 (diff) | |
download | linux-147c8f376e5526ebfaf2827734916414db52a3c4.tar.xz |
irqchip/gic-v3-its: Move minimum LPI requirements to individual busses
At the moment, the core ITS driver imposes the allocation to be
in chunks of 32. As we want to relax this on a per bus basis, let's
move the the the allocation constraints to each bus.
No functionnal change.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c')
-rw-r--r-- | drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c b/drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c index 4eca5c763766..606efa64adff 100644 --- a/drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c +++ b/drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c @@ -45,6 +45,9 @@ static int its_fsl_mc_msi_prepare(struct irq_domain *msi_domain, */ info->scratchpad[0].ul = mc_bus_dev->icid; msi_info = msi_get_domain_info(msi_domain->parent); + + /* Allocate at least 32 MSIs, and always as a power of 2 */ + nvec = max_t(int, 32, roundup_pow_of_two(nvec)); return msi_info->ops->msi_prepare(msi_domain->parent, dev, nvec, info); } |