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| author | Jordan Crouse <jcrouse@codeaurora.org> | 2020-11-09 21:47:25 +0300 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2020-11-10 15:25:49 +0300 |
| commit | 5c7469c66f953a2eb223468d7aa40062af9c14ab (patch) | |
| tree | eb8dc032b97c02c1005c210ecd4749c50d8a5cb7 /drivers/iommu/arm/arm-smmu/arm-smmu.h | |
| parent | 3045fe45abbcba2ae4c3ce9b3c610523651be1c7 (diff) | |
| download | linux-5c7469c66f953a2eb223468d7aa40062af9c14ab.tar.xz | |
iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU
Add a special implementation for the SMMU attached to most Adreno GPU
target triggered from the qcom,adreno-smmu compatible string.
The new Adreno SMMU implementation will enable split pagetables
(TTBR1) for the domain attached to the GPU device (SID 0) and
hard code it context bank 0 so the GPU hardware can implement
per-instance pagetables.
Co-developed-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201109184728.2463097-2-jcrouse@codeaurora.org
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/iommu/arm/arm-smmu/arm-smmu.h')
| -rw-r--r-- | drivers/iommu/arm/arm-smmu/arm-smmu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h index b71647eaa319..9a5eb6782918 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.h +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h @@ -521,6 +521,7 @@ static inline void arm_smmu_writeq(struct arm_smmu_device *smmu, int page, struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu); struct arm_smmu_device *nvidia_smmu_impl_init(struct arm_smmu_device *smmu); struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu); +struct arm_smmu_device *qcom_adreno_smmu_impl_init(struct arm_smmu_device *smmu); void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx); int arm_mmu500_reset(struct arm_smmu_device *smmu); |