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| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-05-08 20:55:54 +0300 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-06-14 13:53:12 +0300 |
| commit | 6268c6eebb13f228d418f9adaca848b3ed5b3cf9 (patch) | |
| tree | be9062dd3872ac7dcaa3eb38159211d55205be56 /drivers/iio | |
| parent | 58b74555afc8affe4ae4f57d396349158433fc80 (diff) | |
| download | linux-6268c6eebb13f228d418f9adaca848b3ed5b3cf9.tar.xz | |
iio: adc: ad7606: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_ALIGN definition.
Update the comment to reflect the fact DMA safety 'may' require
separate cachelines.
Fixes: 7989b4bb23fe ("iio: adc: ad7616: Add support for AD7616 ADC")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-15-jic23@kernel.org
Diffstat (limited to 'drivers/iio')
| -rw-r--r-- | drivers/iio/adc/ad7606.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index 4f82d7c9acfd..2dc4f599f9df 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -116,11 +116,11 @@ struct ad7606_state { struct completion completion; /* - * DMA (thus cache coherency maintenance) requires the + * DMA (thus cache coherency maintenance) may require the * transfer buffers to live in their own cache lines. * 16 * 16-bit samples + 64-bit timestamp */ - unsigned short data[20] ____cacheline_aligned; + unsigned short data[20] __aligned(IIO_DMA_MINALIGN); __be16 d16[2]; }; |