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| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-05-08 20:55:56 +0300 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-06-14 13:53:13 +0300 |
| commit | 211f810f8fae05c1f78e531b2b113ea1ab3d1ce7 (patch) | |
| tree | 4c57c5b334e72bc92bc42852681ef66d0a9d295c /drivers/iio | |
| parent | 009ae227a1dace2d4d27c804e5bd65907e1d0557 (diff) | |
| download | linux-211f810f8fae05c1f78e531b2b113ea1ab3d1ce7.tar.xz | |
iio: adc: ad7768-1: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to reflect that separate cachelines 'may' be
required.
Fixes: a5f8c7da3dbe ("iio: adc: Add AD7768-1 ADC basic support")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-17-jic23@kernel.org
Diffstat (limited to 'drivers/iio')
| -rw-r--r-- | drivers/iio/adc/ad7768-1.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/iio/adc/ad7768-1.c b/drivers/iio/adc/ad7768-1.c index aa42ba759fa1..60f394da4640 100644 --- a/drivers/iio/adc/ad7768-1.c +++ b/drivers/iio/adc/ad7768-1.c @@ -163,7 +163,7 @@ struct ad7768_state { struct gpio_desc *gpio_sync_in; const char *labels[ARRAY_SIZE(ad7768_channels)]; /* - * DMA (thus cache coherency maintenance) requires the + * DMA (thus cache coherency maintenance) may require the * transfer buffers to live in their own cache lines. */ union { @@ -173,7 +173,7 @@ struct ad7768_state { } scan; __be32 d32; u8 d8[2]; - } data ____cacheline_aligned; + } data __aligned(IIO_DMA_MINALIGN); }; static int ad7768_spi_reg_read(struct ad7768_state *st, unsigned int addr, |