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| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-05-08 20:55:55 +0300 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-06-14 13:53:12 +0300 |
| commit | 009ae227a1dace2d4d27c804e5bd65907e1d0557 (patch) | |
| tree | 5b653f34cb945b1fa3e5148805c6ce277a5e17f6 /drivers/iio/adc/ad7766.c | |
| parent | 6268c6eebb13f228d418f9adaca848b3ed5b3cf9 (diff) | |
| download | linux-009ae227a1dace2d4d27c804e5bd65907e1d0557.tar.xz | |
iio: adc: ad7766: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to reflect the fact DMA safety 'may' require
separate cachelines.
Fixes: aa16c6bd0e09 ("iio:adc: Add support for AD7766/AD7767")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-16-jic23@kernel.org
Diffstat (limited to 'drivers/iio/adc/ad7766.c')
| -rw-r--r-- | drivers/iio/adc/ad7766.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/iio/adc/ad7766.c b/drivers/iio/adc/ad7766.c index 51ee9482e0df..3079a0872947 100644 --- a/drivers/iio/adc/ad7766.c +++ b/drivers/iio/adc/ad7766.c @@ -45,13 +45,12 @@ struct ad7766 { struct spi_message msg; /* - * DMA (thus cache coherency maintenance) requires the + * DMA (thus cache coherency maintenance) may require the * transfer buffers to live in their own cache lines. * Make the buffer large enough for one 24 bit sample and one 64 bit * aligned 64 bit timestamp. */ - unsigned char data[ALIGN(3, sizeof(s64)) + sizeof(s64)] - ____cacheline_aligned; + unsigned char data[ALIGN(3, sizeof(s64)) + sizeof(s64)] __aligned(IIO_DMA_MINALIGN); }; /* |