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| author | Len Brown <len.brown@intel.com> | 2015-03-26 06:20:37 +0300 | 
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2015-08-16 05:10:26 +0300 | 
| commit | 493f133f47750aa5566fafa9403617e3f0506f8c (patch) | |
| tree | 9abd99da8e0b0d56cefb5ccf550bcf200ba831ca /drivers/idle/intel_idle.c | |
| parent | 7dd0e0af64afe4aa08ccdd167f64bd007f09b515 (diff) | |
| download | linux-493f133f47750aa5566fafa9403617e3f0506f8c.tar.xz | |
intel_idle: Skylake Client Support
Skylake Client CPU idle Power states (C-states)
are similar to the previous generation, Broadwell.
However, Skylake does get its own table with updated
worst-case latency and average energy-break-even residency values.
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/idle/intel_idle.c')
| -rw-r--r-- | drivers/idle/intel_idle.c | 69 | 
1 files changed, 69 insertions, 0 deletions
| diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index 008e943d224d..3a3738fe016b 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c @@ -591,6 +591,67 @@ static struct cpuidle_state bdw_cstates[] = {  		.enter = NULL }  }; +static struct cpuidle_state skl_cstates[] = { +	{ +		.name = "C1-SKL", +		.desc = "MWAIT 0x00", +		.flags = MWAIT2flg(0x00), +		.exit_latency = 2, +		.target_residency = 2, +		.enter = &intel_idle, +		.enter_freeze = intel_idle_freeze, }, +	{ +		.name = "C1E-SKL", +		.desc = "MWAIT 0x01", +		.flags = MWAIT2flg(0x01), +		.exit_latency = 10, +		.target_residency = 20, +		.enter = &intel_idle, +		.enter_freeze = intel_idle_freeze, }, +	{ +		.name = "C3-SKL", +		.desc = "MWAIT 0x10", +		.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED, +		.exit_latency = 70, +		.target_residency = 100, +		.enter = &intel_idle, +		.enter_freeze = intel_idle_freeze, }, +	{ +		.name = "C6-SKL", +		.desc = "MWAIT 0x20", +		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, +		.exit_latency = 75, +		.target_residency = 200, +		.enter = &intel_idle, +		.enter_freeze = intel_idle_freeze, }, +	{ +		.name = "C7s-SKL", +		.desc = "MWAIT 0x33", +		.flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED, +		.exit_latency = 124, +		.target_residency = 800, +		.enter = &intel_idle, +		.enter_freeze = intel_idle_freeze, }, +	{ +		.name = "C8-SKL", +		.desc = "MWAIT 0x40", +		.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED, +		.exit_latency = 174, +		.target_residency = 800, +		.enter = &intel_idle, +		.enter_freeze = intel_idle_freeze, }, +	{ +		.name = "C10-SKL", +		.desc = "MWAIT 0x60", +		.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED, +		.exit_latency = 890, +		.target_residency = 5000, +		.enter = &intel_idle, +		.enter_freeze = intel_idle_freeze, }, +	{ +		.enter = NULL } +}; +  static struct cpuidle_state atom_cstates[] = {  	{  		.name = "C1E-ATM", @@ -810,6 +871,12 @@ static const struct idle_cpu idle_cpu_bdw = {  	.disable_promotion_to_c1e = true,  }; +static const struct idle_cpu idle_cpu_skl = { +	.state_table = skl_cstates, +	.disable_promotion_to_c1e = true, +}; + +  static const struct idle_cpu idle_cpu_avn = {  	.state_table = avn_cstates,  	.disable_promotion_to_c1e = true, @@ -844,6 +911,8 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {  	ICPU(0x47, idle_cpu_bdw),  	ICPU(0x4f, idle_cpu_bdw),  	ICPU(0x56, idle_cpu_bdw), +	ICPU(0x4e, idle_cpu_skl), +	ICPU(0x5e, idle_cpu_skl),  	{}  };  MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids); | 
