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| author | Jeremy Kerr <jk@codeconstruct.com.au> | 2023-03-31 12:14:59 +0300 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2023-04-28 09:18:53 +0300 |
| commit | d782188cbb05a196e46a4838484f020ceeb889ec (patch) | |
| tree | d491cf6924e40a862ca3bf9138ad2395111dfe5f /drivers/i3c/master/dw-i3c-master.h | |
| parent | 66b32e3d2c6daeeafb80fa41f3a41e4c0ab85cc6 (diff) | |
| download | linux-d782188cbb05a196e46a4838484f020ceeb889ec.tar.xz | |
i3c: dw: Add infrastructure for platform-specific implementations
The dw i3c core can be integrated into various SoC devices. Platforms
that use this core may need a little configuration that is specific to
that platform.
Add some infrastructure to allow platform-specific behaviour: common
probe/remove functions, a set of platform hook operations, and a pointer
for platform-specific data in struct dw_i3c_master. Move the common api
into a new (i3c local) header file.
Platforms will provide their own struct platform_driver, which allocates
struct dw_i3c_master, does any platform-specific probe behaviour, and
calls into the common probe.
A future change will add new platform support that uses this
infrastructure.
Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230331091501.3800299-2-jk@codeconstruct.com.au
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'drivers/i3c/master/dw-i3c-master.h')
| -rw-r--r-- | drivers/i3c/master/dw-i3c-master.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/drivers/i3c/master/dw-i3c-master.h b/drivers/i3c/master/dw-i3c-master.h new file mode 100644 index 000000000000..915dd0f2c069 --- /dev/null +++ b/drivers/i3c/master/dw-i3c-master.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023 Code Construct + * + * Author: Jeremy Kerr <jk@codeconstruct.com.au> + */ + +#include <linux/clk.h> +#include <linux/i3c/master.h> +#include <linux/reset.h> +#include <linux/types.h> + +#define DW_I3C_MAX_DEVS 32 + +struct dw_i3c_master_caps { + u8 cmdfifodepth; + u8 datafifodepth; +}; + +struct dw_i3c_master { + struct i3c_master_controller base; + u16 maxdevs; + u16 datstartaddr; + u32 free_pos; + struct { + struct list_head list; + struct dw_i3c_xfer *cur; + spinlock_t lock; + } xferqueue; + struct dw_i3c_master_caps caps; + void __iomem *regs; + struct reset_control *core_rst; + struct clk *core_clk; + char version[5]; + char type[5]; + u8 addrs[DW_I3C_MAX_DEVS]; + + /* platform-specific data */ + const struct dw_i3c_platform_ops *platform_ops; +}; + +struct dw_i3c_platform_ops { + /* + * Called on early bus init: the i3c has been set up, but before any + * transactions have taken place. Platform implementations may use to + * perform actual device enabling with the i3c core ready. + */ + int (*init)(struct dw_i3c_master *i3c); +}; + +extern int dw_i3c_common_probe(struct dw_i3c_master *master, + struct platform_device *pdev); +extern void dw_i3c_common_remove(struct dw_i3c_master *master); + |