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authorSowjanya Komatineni <skomatineni@nvidia.com>2020-07-27 23:57:22 +0300
committerWolfram Sang <wsa@kernel.org>2020-07-28 19:32:32 +0300
commit0d722620986722208c6bc2a67f5d68aa73b7cd5f (patch)
tree6eead590290d6df34b990d6679fae26fe5fd5d94 /drivers/i2c
parent42aa38b54e35216351e52bb03382a38edc6f1bb8 (diff)
downloadlinux-0d722620986722208c6bc2a67f5d68aa73b7cd5f.tar.xz
i2c: tegra: Fix runtime resume to re-init VI I2C
VI I2C is on host1x bus and is part of VE power domain. During suspend/resume VE power domain goes through power off/on. So, controller reset followed by i2c re-initialization is required after the domain power up. This patch fixes it. Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
Diffstat (limited to 'drivers/i2c')
-rw-r--r--drivers/i2c/busses/i2c-tegra.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 7b93c454b4c7..1bf36669ca67 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -293,6 +293,8 @@ struct tegra_i2c_dev {
bool is_curr_atomic_xfer;
};
+static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev, bool clk_reinit);
+
static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
unsigned long reg)
{
@@ -675,8 +677,22 @@ static int __maybe_unused tegra_i2c_runtime_resume(struct device *dev)
goto disable_slow_clk;
}
+ /*
+ * VI I2C device is attached to VE power domain which goes through
+ * power ON/OFF during PM runtime resume/suspend. So, controller
+ * should go through reset and need to re-initialize after power
+ * domain ON.
+ */
+ if (i2c_dev->is_vi) {
+ ret = tegra_i2c_init(i2c_dev, true);
+ if (ret)
+ goto disable_div_clk;
+ }
+
return 0;
+disable_div_clk:
+ clk_disable(i2c_dev->div_clk);
disable_slow_clk:
clk_disable(i2c_dev->slow_clk);
disable_fast_clk: