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| author | Thierry Reding <treding@nvidia.com> | 2014-04-16 11:22:38 +0400 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2014-06-06 01:09:20 +0400 |
| commit | 0444c0ff3cef9f99b19bbb1f0b3f5d7a22daab25 (patch) | |
| tree | f75b1d7096c135d62c0f797cd5e1127fc7d2e1cd /drivers/gpu/drm/tegra/dc.c | |
| parent | 501bcbd1b233edc160d0c770c03747a1c4aa14e5 (diff) | |
| download | linux-0444c0ff3cef9f99b19bbb1f0b3f5d7a22daab25.tar.xz | |
drm/tegra: dc - Use proper H/V ref-to-sync values
For HDMI compliance both of these values need to be set to 1.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dc.c')
| -rw-r--r-- | drivers/gpu/drm/tegra/dc.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index 33e03a69a040..b1b1395f06c7 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -589,9 +589,8 @@ static bool tegra_crtc_mode_fixup(struct drm_crtc *crtc, static int tegra_dc_set_timings(struct tegra_dc *dc, struct drm_display_mode *mode) { - /* TODO: For HDMI compliance, h & v ref_to_sync should be set to 1 */ - unsigned int h_ref_to_sync = 0; - unsigned int v_ref_to_sync = 0; + unsigned int h_ref_to_sync = 1; + unsigned int v_ref_to_sync = 1; unsigned long value; tegra_dc_writel(dc, 0x0, DC_DISP_DISP_TIMING_OPTIONS); |