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authorDave Airlie <airlied@redhat.com>2008-12-09 08:30:50 +0300
committerDave Airlie <airlied@redhat.com>2008-12-09 08:30:50 +0300
commitfae7043c65d65f3e5b34bac4431c6ccc49190c41 (patch)
treec61c3fb8e47ec57f81a3f1e6318b69771d924374 /drivers/gpu/drm/radeon/radeon_drv.h
parent218d11a8b071b23b76c484fd5f72a4fe3306801e (diff)
downloadlinux-fae7043c65d65f3e5b34bac4431c6ccc49190c41.tar.xz
drm/radeon: don't actually enable the IRQ regs until irq is enabled
vblank can try and enable the IRQ registers before we've set the interrupt handler up. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_drv.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 7a183789be97..3bbb871b25d5 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -299,7 +299,6 @@ typedef struct drm_radeon_private {
atomic_t swi_emitted;
int vblank_crtc;
uint32_t irq_enable_reg;
- int irq_enabled;
uint32_t r500_disp_irq_reg;
struct radeon_surface surfaces[RADEON_MAX_SURFACES];