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authorDavid Herrmann <dh.herrmann@gmail.com>2014-08-29 14:12:38 +0400
committerDave Airlie <airlied@redhat.com>2014-09-10 11:41:20 +0400
commitedf0ac7c67ce596f43d66a781660889bbdcc9505 (patch)
tree3dc84b9857549790628b9173c4f5d120507f6298 /drivers/gpu/drm/radeon/radeon.h
parent969939087da7aca386ff166a1c67ee9707215feb (diff)
downloadlinux-edf0ac7c67ce596f43d66a781660889bbdcc9505.tar.xz
drm: drop DRM_DEBUG_CODE
DRM_DEBUG_CODE is currently always set, so distributions enable it. The only reason to keep support in code is if developers wanted to disable debug support. Sounds unlikely. All the DRM_DEBUG() printks are still guarded by a drm_debug read. So if its cacheline is read once, they're discarded pretty fast.. There should hardly be any performance penalty, it's even guarded by unlikely(). Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon.h17
1 files changed, 12 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index d80dc547a105..79c988db79ad 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -2776,18 +2776,25 @@ void radeon_atombios_fini(struct radeon_device *rdev);
/*
* RING helpers.
*/
-#if DRM_DEBUG_CODE == 0
+
+/**
+ * radeon_ring_write - write a value to the ring
+ *
+ * @ring: radeon_ring structure holding ring information
+ * @v: dword (dw) value to write
+ *
+ * Write a value to the requested ring buffer (all asics).
+ */
static inline void radeon_ring_write(struct radeon_ring *ring, uint32_t v)
{
+ if (ring->count_dw <= 0)
+ DRM_ERROR("radeon: writing more dwords to the ring than expected!\n");
+
ring->ring[ring->wptr++] = v;
ring->wptr &= ring->ptr_mask;
ring->count_dw--;
ring->ring_free_dw--;
}
-#else
-/* With debugging this is just too big to inline */
-void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
-#endif
/*
* ASICs macro.