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author | Mauro Rossi <issor.oruam@gmail.com> | 2018-08-12 22:43:03 +0300 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2018-08-27 19:10:19 +0300 |
commit | a69e40fd824ddae4f515ca8e754882bebf644ed4 (patch) | |
tree | 32b9b6c846280d4ce4ec91ddac74343cd078d6a3 /drivers/gpu/drm/radeon/r600_reg.h | |
parent | 00ecc6e6d4eeba9681ec91f9601a9ed1a68a9e7f (diff) | |
download | linux-a69e40fd824ddae4f515ca8e754882bebf644ed4.tar.xz |
drm/radeon: enable ABGR and XBGR formats (v2)
Add support for DRM_FORMAT_{A,X}BGR8888 in atombios_crtc
Swapping of red and blue channels is implemented for radeon chipsets:
DCE2/R6xx and later - crossbar registers defined where needed and used
DCE1/R5xx - AVIVO_D1GRPH_SWAP_RB bit is used
(v2) Set AVIVO_D1GRPH_SWAP_RB bit in fb_format, using bitwise OR for DCE1 path
Use bitwise OR where required for big endian settings in fb_swap
Use existing code style CHIP_R600 condition, fix typo in R600 blue crossbar
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600_reg.h')
-rw-r--r-- | drivers/gpu/drm/radeon/r600_reg.h | 31 |
1 files changed, 26 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/r600_reg.h b/drivers/gpu/drm/radeon/r600_reg.h index 3ef202629e7e..85e85ac3ba4d 100644 --- a/drivers/gpu/drm/radeon/r600_reg.h +++ b/drivers/gpu/drm/radeon/r600_reg.h @@ -87,11 +87,32 @@ #define R600_MEDIUM_VID_LOWER_GPIO_CNTL 0x720 #define R600_LOW_VID_LOWER_GPIO_CNTL 0x724 -#define R600_D1GRPH_SWAP_CONTROL 0x610C -# define R600_D1GRPH_SWAP_ENDIAN_NONE (0 << 0) -# define R600_D1GRPH_SWAP_ENDIAN_16BIT (1 << 0) -# define R600_D1GRPH_SWAP_ENDIAN_32BIT (2 << 0) -# define R600_D1GRPH_SWAP_ENDIAN_64BIT (3 << 0) +#define R600_D1GRPH_SWAP_CONTROL 0x610C +# define R600_D1GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0) +# define R600_D1GRPH_SWAP_ENDIAN_NONE 0 +# define R600_D1GRPH_SWAP_ENDIAN_16BIT 1 +# define R600_D1GRPH_SWAP_ENDIAN_32BIT 2 +# define R600_D1GRPH_SWAP_ENDIAN_64BIT 3 +# define R600_D1GRPH_RED_CROSSBAR(x) (((x) & 0x3) << 4) +# define R600_D1GRPH_RED_SEL_R 0 +# define R600_D1GRPH_RED_SEL_G 1 +# define R600_D1GRPH_RED_SEL_B 2 +# define R600_D1GRPH_RED_SEL_A 3 +# define R600_D1GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6) +# define R600_D1GRPH_GREEN_SEL_G 0 +# define R600_D1GRPH_GREEN_SEL_B 1 +# define R600_D1GRPH_GREEN_SEL_A 2 +# define R600_D1GRPH_GREEN_SEL_R 3 +# define R600_D1GRPH_BLUE_CROSSBAR(x) (((x) & 0x3) << 8) +# define R600_D1GRPH_BLUE_SEL_B 0 +# define R600_D1GRPH_BLUE_SEL_A 1 +# define R600_D1GRPH_BLUE_SEL_R 2 +# define R600_D1GRPH_BLUE_SEL_G 3 +# define R600_D1GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3) << 10) +# define R600_D1GRPH_ALPHA_SEL_A 0 +# define R600_D1GRPH_ALPHA_SEL_R 1 +# define R600_D1GRPH_ALPHA_SEL_G 2 +# define R600_D1GRPH_ALPHA_SEL_B 3 #define R600_HDP_NONSURFACE_BASE 0x2c04 |