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author | Alex Deucher <alexander.deucher@amd.com> | 2012-11-08 05:05:07 +0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2013-06-28 03:15:48 +0400 |
commit | 0c4aaeae441495b21b9c7d306098ee4911bfa16a (patch) | |
tree | 6865baac28f703c024262ba1feb0ef8b63d57c69 /drivers/gpu/drm/radeon/ppsmc.h | |
parent | 06793dfba2215f3d31a7a12e5fd8901f18ee035a (diff) | |
download | linux-0c4aaeae441495b21b9c7d306098ee4911bfa16a.tar.xz |
drm/radeon: add dpm UVD handling for TN asics (v2)
v2: fix typo noticed by Dan Carpenter
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/ppsmc.h')
-rw-r--r-- | drivers/gpu/drm/radeon/ppsmc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/ppsmc.h b/drivers/gpu/drm/radeon/ppsmc.h index 88838083448b..66c4bedba0dc 100644 --- a/drivers/gpu/drm/radeon/ppsmc.h +++ b/drivers/gpu/drm/radeon/ppsmc.h @@ -77,6 +77,7 @@ typedef uint8_t PPSMC_Result; #define PPSMC_MSG_PG_SIMD_Config ((uint32_t) 0x108) #define PPSMC_MSG_DCE_RemoveVoltageAdjustment ((uint32_t) 0x11d) #define PPSMC_MSG_DCE_AllowVoltageAdjustment ((uint32_t) 0x11e) +#define PPSMC_MSG_UVD_DPM_Config ((uint32_t) 0x124) typedef uint16_t PPSMC_Msg; |