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| author | Jammy Zhou <Jammy.Zhou@amd.com> | 2014-11-03 16:58:20 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-11-06 23:42:44 +0300 |
| commit | dc4edad6530a9b7b66c3d905e2bc06021a05dcad (patch) | |
| tree | 208683fb1562879a8a68b56b47f0e94672d5e07b /drivers/gpu/drm/radeon/cik.c | |
| parent | 66338feee458cb2b04e8f2b515b8d660e49ba29a (diff) | |
| download | linux-dc4edad6530a9b7b66c3d905e2bc06021a05dcad.tar.xz | |
drm/radeon: set correct CE ram size for CIK
CE ram size is 32k/0k/0k for GFX/CS0/CS1 with CIK
Ported from amdgpu driver.
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/radeon/cik.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/cik.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index 377afa504d2b..af6c7c5461c1 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c @@ -4313,8 +4313,8 @@ static int cik_cp_gfx_start(struct radeon_device *rdev) /* init the CE partitions. CE only used for gfx on CIK */ radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); radeon_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE)); - radeon_ring_write(ring, 0xc000); - radeon_ring_write(ring, 0xc000); + radeon_ring_write(ring, 0x8000); + radeon_ring_write(ring, 0x8000); /* setup clear context state */ radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); |