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author | Palmer Dabbelt <palmer@rivosinc.com> | 2024-08-14 23:13:26 +0300 |
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committer | Palmer Dabbelt <palmer@rivosinc.com> | 2024-08-15 23:12:21 +0300 |
commit | 32d5f7add080a936e28ab4142bfeea6b06999789 (patch) | |
tree | cdc02d299aae5f7fdf22e68bec3ecc58cb47533b /drivers/gpu/drm/nouveau/nouveau_chan.c | |
parent | e01d48c699bbe015d887cb598e4047f08f3998a8 (diff) | |
parent | 1f5288874de776412041022607513ffac74ae1a6 (diff) | |
download | linux-32d5f7add080a936e28ab4142bfeea6b06999789.tar.xz |
Merge patch series "RISC-V: hwprobe: Misaligned scalar perf fix and rename"
Evan Green <evan@rivosinc.com> says:
The CPUPERF0 hwprobe key was documented and identified in code as
a bitmask value, but its contents were an enum. This produced
incorrect behavior in conjunction with the WHICH_CPUS hwprobe flag.
The first patch in this series fixes the bitmask/enum problem by
creating a new hwprobe key that returns the same data, but is
properly described as a value instead of a bitmask. The second patch
renames the value definitions in preparation for adding vector misaligned
access info. As of this version, the old defines are kept in place to
maintain source compatibility with older userspace programs.
* b4-shazam-merge:
RISC-V: hwprobe: Add SCALAR to misaligned perf defines
RISC-V: hwprobe: Add MISALIGNED_PERF key
Link: https://lore.kernel.org/r/20240809214444.3257596-1-evan@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_chan.c')
0 files changed, 0 insertions, 0 deletions