diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2020-06-20 06:08:47 +0300 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2020-07-24 11:51:00 +0300 |
| commit | f844eb485eb056ad3b67e49f95cbc6c685a73db4 (patch) | |
| tree | 93f1e3ac770aa0c70b859f748cd88c908e78f704 /drivers/gpu/drm/nouveau/dispnv50/ovly907e.c | |
| parent | 66f7b7bddfe60a708c7711e47c95d20db05e2110 (diff) | |
| download | linux-f844eb485eb056ad3b67e49f95cbc6c685a73db4.tar.xz | |
drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw image_set()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/dispnv50/ovly907e.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/dispnv50/ovly907e.c | 37 |
1 files changed, 26 insertions, 11 deletions
diff --git a/drivers/gpu/drm/nouveau/dispnv50/ovly907e.c b/drivers/gpu/drm/nouveau/dispnv50/ovly907e.c index b2780f5f6e64..645130d18a99 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/ovly907e.c +++ b/drivers/gpu/drm/nouveau/dispnv50/ovly907e.c @@ -24,6 +24,8 @@ #include <nvif/push507c.h> +#include <nvhw/class/cl907e.h> + static int ovly907e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) { @@ -33,17 +35,30 @@ ovly907e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) if ((ret = PUSH_WAIT(push, 12))) return ret; - PUSH_NVSQ(push, NV907E, 0x0084, asyw->image.interval << 4); - PUSH_NVSQ(push, NV907E, 0x00c0, asyw->image.handle[0]); - PUSH_NVSQ(push, NV907E, 0x0100, 0x00000002); - PUSH_NVSQ(push, NV907E, 0x0400, asyw->image.offset[0] >> 8); - PUSH_NVSQ(push, NV907E, 0x0408, asyw->image.h << 16 | asyw->image.w, - 0x040c, asyw->image.layout << 24 | - (asyw->image.pitch[0] >> 8) << 8 | - asyw->image.blocks[0] << 8 | - asyw->image.blockh, - 0x0410, asyw->image.format << 8 | - asyw->image.colorspace); + PUSH_MTHD(push, NV907E, SET_PRESENT_CONTROL, + NVDEF(NV907E, SET_PRESENT_CONTROL, BEGIN_MODE, ASAP) | + NVVAL(NV907E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval)); + + PUSH_MTHD(push, NV907E, SET_CONTEXT_DMA_ISO, asyw->image.handle[0]); + + PUSH_MTHD(push, NV907E, SET_COMPOSITION_CONTROL, + NVDEF(NV907E, SET_COMPOSITION_CONTROL, MODE, OPAQUE)); + + PUSH_MTHD(push, NV907E, SURFACE_SET_OFFSET, asyw->image.offset[0] >> 8); + + PUSH_MTHD(push, NV907E, SURFACE_SET_SIZE, + NVVAL(NV907E, SURFACE_SET_SIZE, WIDTH, asyw->image.w) | + NVVAL(NV907E, SURFACE_SET_SIZE, HEIGHT, asyw->image.h), + + SURFACE_SET_STORAGE, + NVVAL(NV907E, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) | + NVVAL(NV907E, SURFACE_SET_STORAGE, PITCH, (asyw->image.pitch[0] >> 8)) | + NVVAL(NV907E, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) | + NVVAL(NV907E, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout), + + SURFACE_SET_PARAMS, + NVVAL(NV907E, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) | + NVVAL(NV907E, SURFACE_SET_PARAMS, COLOR_SPACE, asyw->image.colorspace)); return 0; } |