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| author | Neil Armstrong <narmstrong@baylibre.com> | 2019-03-25 17:18:21 +0300 |
|---|---|---|
| committer | Neil Armstrong <narmstrong@baylibre.com> | 2019-04-09 12:26:02 +0300 |
| commit | 64d598a106c3d6c06071fd66780d3d7d7d15251a (patch) | |
| tree | 975f16e57eeba44227893f7f5d5fc43fda5f43cb /drivers/gpu/drm/meson/meson_venc.c | |
| parent | 68679d41a3d6d7e55ed49b4e5688d1089de7c5a7 (diff) | |
| download | linux-64d598a106c3d6c06071fd66780d3d7d7d15251a.tar.xz | |
drm/meson: Add G12A support for CVBS Encoder
The Meson G12A SoCs uses the exact same CVBS encoder except a simple
CVBS DAC register offset and settings delta.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[narmstrong: fixed subject typo]
Tested-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190325141824.21259-9-narmstrong@baylibre.com
Diffstat (limited to 'drivers/gpu/drm/meson/meson_venc.c')
| -rw-r--r-- | drivers/gpu/drm/meson/meson_venc.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c index 66d73a932d19..6faca7313339 100644 --- a/drivers/gpu/drm/meson/meson_venc.c +++ b/drivers/gpu/drm/meson/meson_venc.c @@ -73,7 +73,9 @@ /* HHI Registers */ #define HHI_GCLK_MPEG2 0x148 /* 0x52 offset in data sheet */ #define HHI_VDAC_CNTL0 0x2F4 /* 0xbd offset in data sheet */ +#define HHI_VDAC_CNTL0_G12A 0x2EC /* 0xbd offset in data sheet */ #define HHI_VDAC_CNTL1 0x2F8 /* 0xbe offset in data sheet */ +#define HHI_VDAC_CNTL1_G12A 0x2F0 /* 0xbe offset in data sheet */ #define HHI_HDMI_PHY_CNTL0 0x3a0 /* 0xe8 offset in data sheet */ struct meson_cvbs_enci_mode meson_cvbs_enci_pal = { @@ -1675,8 +1677,13 @@ void meson_venc_disable_vsync(struct meson_drm *priv) void meson_venc_init(struct meson_drm *priv) { /* Disable CVBS VDAC */ - regmap_write(priv->hhi, HHI_VDAC_CNTL0, 0); - regmap_write(priv->hhi, HHI_VDAC_CNTL1, 8); + if (meson_vpu_is_compatible(priv, "amlogic,meson-g12a-vpu")) { + regmap_write(priv->hhi, HHI_VDAC_CNTL0_G12A, 0); + regmap_write(priv->hhi, HHI_VDAC_CNTL1_G12A, 8); + } else { + regmap_write(priv->hhi, HHI_VDAC_CNTL0, 0); + regmap_write(priv->hhi, HHI_VDAC_CNTL1, 8); + } /* Power Down Dacs */ writel_relaxed(0xff, priv->io_base + _REG(VENC_VDAC_SETTING)); |