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authorBen Widawsky <ben@bwidawsk.net>2012-08-21 03:15:13 +0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-08-22 20:05:54 +0400
commit71e172e8d141fc167b1cca28271fd39c8cf63ed3 (patch)
treed99a23956488c6975ecf4440ce0e39975e616ed9 /drivers/gpu/drm/i915/i915_reg.h
parent44f46b4222a9ba5b21dcdf13f93dc53f48768d2b (diff)
downloadlinux-71e172e8d141fc167b1cca28271fd39c8cf63ed3.tar.xz
drm/i915: Add ERR_INT to gen7 error state
ERR_INT can generate interrupts. However since most of the conditions seem quite fatal the patch opts to simply report it in error state instead of adding more complexity to the interrupt handler for little gain (the bits are sticky anyway). Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Antti Koskipaa <antti.koskipaa@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index fd6a26a49b42..a20885c0f35f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -500,6 +500,7 @@
#define DMA_FADD_I8XX 0x020d0
#define ERROR_GEN6 0x040a0
+#define GEN7_ERR_INT 0x44040
/* GM45+ chicken bits -- debug workaround bits that may be required
* for various sorts of correct behavior. The top 16 bits of each are