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| author | Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> | 2020-04-30 22:56:34 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-05-04 18:44:52 +0300 |
| commit | ecab0f3d055d333640bbe2aa5a5141574a65c534 (patch) | |
| tree | 5654e7b5993dd39383e84e9527e348fa3019e5dd /drivers/gpu/drm/i915/display | |
| parent | 9728889f42b9ba078f86cd11535a89df29e93b33 (diff) | |
| download | linux-ecab0f3d055d333640bbe2aa5a5141574a65c534.tar.xz | |
drm/i915: Track active_pipes in bw_state
We need to calculate SAGV mask also in a non-modeset
commit, however currently active_pipes are only calculated
for modesets in global atomic state, thus now we will be
tracking those also in bw_state in order to be able to
properly access global data.
v2: - Removed pre/post plane SAGV updates from modeset(Ville)
- Now tracking active pipes in intel_can_enable_sagv(Ville)
v3: - lock global state if active_pipes change as well(Ville)
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200430195634.7666-1-stanislav.lisovskiy@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_bw.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display.c | 9 |
2 files changed, 7 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_bw.h b/drivers/gpu/drm/i915/display/intel_bw.h index d6df91058223..898b4a85ccab 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.h +++ b/drivers/gpu/drm/i915/display/intel_bw.h @@ -26,6 +26,9 @@ struct intel_bw_state { unsigned int data_rate[I915_MAX_PIPES]; u8 num_active_planes[I915_MAX_PIPES]; + + /* bitmask of active pipes */ + u8 active_pipes; }; #define to_intel_bw_state(x) container_of((x), struct intel_bw_state, base) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 6bb87965801e..268d65e23472 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -15379,11 +15379,11 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) intel_set_cdclk_pre_plane_update(state); - intel_sagv_pre_plane_update(state); - intel_modeset_verify_disabled(dev_priv, state); } + intel_sagv_pre_plane_update(state); + /* Complete the events for pipes that have now been disabled */ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { bool modeset = needs_modeset(new_crtc_state); @@ -15476,11 +15476,10 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) intel_check_cpu_fifo_underruns(dev_priv); intel_check_pch_fifo_underruns(dev_priv); - if (state->modeset) { + if (state->modeset) intel_verify_planes(state); - intel_sagv_post_plane_update(state); - } + intel_sagv_post_plane_update(state); drm_atomic_helper_commit_hw_done(&state->base); |