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authorBrian Starkey <brian.starkey@arm.com>2016-11-08 14:36:14 +0300
committerLiviu Dudau <Liviu.Dudau@arm.com>2016-11-08 14:40:02 +0300
commite64053f05eb924db45f90a1556a200d1acb4b01e (patch)
treee2c81d2396738319539cf9f66a0bcf98452dd4df /drivers/gpu/drm/arm
parented8b0c0f93fd91447770ced4a7ecac1a1f39eae2 (diff)
downloadlinux-e64053f05eb924db45f90a1556a200d1acb4b01e.tar.xz
drm: mali-dp: Clear CVAL when leaving config mode
It's possible for CVAL to get set whilst we are in config mode. If this happens, afer we leave config mode the HW will latch whatever configuration is in the registers at the next vsync. Most likely this will be a partial configuration, as we'll be racing against the ongoing atomic_commit. To avoid this, clear CVAL before leaving config mode. Signed-off-by: Brian Starkey <brian.starkey@arm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Diffstat (limited to 'drivers/gpu/drm/arm')
-rw-r--r--drivers/gpu/drm/arm/malidp_hw.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/arm/malidp_hw.c b/drivers/gpu/drm/arm/malidp_hw.c
index 18c476605c0c..4bdf531f7844 100644
--- a/drivers/gpu/drm/arm/malidp_hw.c
+++ b/drivers/gpu/drm/arm/malidp_hw.c
@@ -125,6 +125,7 @@ static void malidp500_leave_config_mode(struct malidp_hw_device *hwdev)
{
u32 status, count = 100;
+ malidp_hw_clearbits(hwdev, MALIDP_CFG_VALID, MALIDP500_CONFIG_VALID);
malidp_hw_clearbits(hwdev, MALIDP500_DC_CONFIG_REQ, MALIDP500_DC_CONTROL);
while (count) {
status = malidp_hw_read(hwdev, hwdev->map.dc_base + MALIDP_REG_STATUS);
@@ -266,6 +267,7 @@ static void malidp550_leave_config_mode(struct malidp_hw_device *hwdev)
{
u32 status, count = 100;
+ malidp_hw_clearbits(hwdev, MALIDP_CFG_VALID, MALIDP550_CONFIG_VALID);
malidp_hw_clearbits(hwdev, MALIDP550_DC_CONFIG_REQ, MALIDP550_DC_CONTROL);
while (count) {
status = malidp_hw_read(hwdev, hwdev->map.dc_base + MALIDP_REG_STATUS);